LTC1448 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1448' PDF : 12 Pages View PDF
LTC1448
TYPICAL PERFORMANCE CHARACTERISTICS
Integral Nonlinearity (INL)
5
4
3
2
1
0
–1
–2
–3
–4
–5
0 512 1024 1536 2048 2560 3072 3584 4095
CODE
1448 G01
Differential Nonlinearity (DNL)
0.5
0.4
0.3
0.2
0.1
0
– 0.1
– 0.2
– 0.3
– 0.4
– 0.5
0 512 1024 1536 2048 2560 3072 3584 4095
CODE
1448 TA02
Minimum Supply Headroom for
Full Output Swing vs Load Current
0.8
∆VOUT < 1LSB
0.7 CODE: ALL 1’s
VOUT = 4.095V
0.6
0.5
0.4
0.3
0.2
0.1
0
0
5
10
15
LOAD CURRENT (mA)
1448 G03
Minimum Output Voltage vs
Output Sink Current
800
CODE: ALL 0’s
700
600
125°C
500
400
25°C
300
–55°C
200
100
0
0
5
10
15
OUTPUT SINK CURRENT (mA)
1448 G04
Supply Current vs
Logic Input Voltage
2.0
1.6
1.2
0.8
0.4
0
0
1
2
3
4
5
LOGIC INPUT VOLTAGE (V)
1448 G06
PIN FUNCTIONS
CLK (Pin 1): Serial Interface Clock. Internal Schmitt trig-
ger on this input allows direct optocoupler interface.
DIN (Pin 2): Serial Interface Data. Data on the DIN pin is
latched into the shift register on the rising edge of the serial
clock.
CS/LD (Pin 3): Serial Interface Enable and Load Control.
When CS/LD is low the CLK signal is enabled, so the data
can be clocked in. When CS/LD is pulled high, data is
loaded from the shift register into the DAC register,
updating the DAC output and the CLK is disabled
internally.
REF (Pin 4): Reference Input for Both DACs. This pin can
be tied to VCC. The output will swing from 0V to REF. The
typical input resistance is 12.5k.
VOUT A, VOUT B (Pins 5, 8): Buffered DAC Outputs.
GND (Pin 6): Ground.
VCC (Pin 7): Positive Supply Input. 2.7V ≤ VCC ≤ 5.5V.
Requires a bypass capacitor to ground.
4
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