LTC1564C View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1564C' PDF : 12 Pages View PDF
LTC1564
PI FU CTIO S
Table 3. Summary of LTC1564 Digital Controls and Modes
EN RST CS/HOLD F3 F2 F1 F0 G3 G2 G1 G0
1
1
1
X X X X X XX X
1
1
1
0
0
1
0
0
0
X X X X X XX X
X
X X X X X XX X
0
0 0 0 0 X XX X
X
X X X X X XX X
0
1
1
Other Than 0000 X X X X
0
1
0
Other Than 0000 X X X X
X = Doesn’t Matter
FUNCTION
Shutdown Mode. Filter Disabled. Latch Holds F and G Inputs Present
when Last CS/HOLD = 0
Shutdown Mode. Filter Disabled. Latch Accepts F and G Inputs
Shutdown Mode. Filter Disabled. Latch Contents (F and G) Reset to All Zeros
Mute Mode. Filter Active, Zero Gain, Reduced Noise
Mute Mode. Filter Active, Zero Gain, Reduced Noise. Latch Contents
(F and G) Reset to All Zeros
Normal Filtering Operation. Latch Holds F and G Inputs Present
when Last CS/HOLD = 0
Normal Filtering Operation. Filter Responds Directly to F and G Input
Pins (See Separate Pin Descriptions)
ANALOG
V+
GROUND PLANE 0.1µF
16 15 14 13 12 11 10 9
LTC1564
1 2 34 5 6 7 8
0.1µF
ANALOG
GROUND PLANE
V+/2
REFERENCE
1µF
V+
0.1µF
16 15 14 13 12 11 10 9
LTC1564
1 2 34 5 6 7 8
V–
SINGLE-POINT
SYSTEM GROUND
DIGITAL GROUND PLANE
(IF ANY)
1564 F01
Figure 1. Dual Supply Ground Plane Connection
SINGLE-POINT
SYSTEM GROUND
DIGITAL GROUND PLANE
(IF ANY)
1564 F01
Figure 2. Single Supply Ground Plane Connection
AGND (Pin 15): Analog Ground. The AGND pin is at the
midpoint of an internal resistive voltage divider, develop-
ing a potential halfway between the V+ and V– pins, with
an equivalent series resistance to the pin of nominally 7k.
(In the shutdown state, analog switch FETs interrupt the
voltage-divider resistors and the AGND pin assumes a
high impedance.) AGND also serves as the internal half-
supply reference in the LTC1564, tied to the noninverting
inputs of all internal op amps and establishing the ground
reference voltage for the IN and OUT pins. Because of this,
very “clean” grounding is recommended, including an
analog ground plane surrounding the package. For dual
supply operation, this ground plane will be tied to the 0V
point and the AGND pin should connect directly to the
ground plane (Figure 1). For single supply operation, in
contrast, if the system signal ground is at V–, the ground
plane should tie to V– and the AGND pin should be AC-
bypassed to the ground plane by at least a 0.1µF high
quality capacitor (at least 1µF for best AC performance)
(Figure 2). As with all high dynamic range analog circuits,
performance in an application will reflect the quality of the
grounding.
7
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