LTC1628CG-SYNC View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1628CG-SYNC' PDF : 32 Pages View PDF
LTC1628-SYNC
APPLICATIO S I FOR ATIO
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1628-SYNC. These items are also illustrated graphi-
cally in the layout diagram of Figure 10. The Figure 11
illustrates the current waveforms present in the various
branches of the 2-phase synchronous regulators operat-
ing in the continuous mode. Check the following in your
layout:
1. Are the top N-channel MOSFETs M1 and M3 located
within 1cm of each other with a common drain connection
at CIN? Do not attempt to split the input decoupling for the
two channels as it can cause a large resonant loop.
2. Are the signal and power grounds kept separate? The
combined LTC1628-SYNC signal ground pin and the
ground return of CINTVCC must return to the combined
COUT (–) terminals. The path formed by the top N-channel
MOSFET, Schottky diode and the CIN capacitor should
have short leads and PC trace lengths. The output capaci-
tor (–) terminals should be connected as close as possible
to the (–) terminals of the input capacitor by placing the
capacitors next to each other and away from the Schottky
loop described above.
3. Do the LTC1628-SYNC VOSENSE pins resistive dividers
connect to the (+) terminals of COUT? The resistive divider
must be connected between the (+) terminal of COUT and
1
RUN/SS1
28
PGOOD
2 SENSE1+
27
TG1
R2
R1
3 SENSE1–
4
VOSENSE1
5
PLLFLTR
fIN
6
PLLIN
26
SW1
25
BOOST1
24
VIN
23
BG1
INTVCC
7
FCB
22
EXTVCC
8
LTC1628-SYNC
21
ITH1
INTVCC
9
SGND
20
PGND
10
3.3V
3.3VOUT
19
BG2
11
ITH2
18
BOOST2
R3
R4
12
VOSENSE2
13 SENSE2–
17
SW2
16
TG2
14 SENSE2+
15
RUN/SS2
RPU
VPULL-UP
(<7V)
PGOOD
L1
RSENSE
CB1
M1
M2
D1
VOUT1
COUT1
RIN
CIN
CVIN
VIN
CINTVCC
COUT2
D2
CB2
M3
M4
RSENSE
L2
GND
VOUT2
1628 F10
Figure 10. LTC1628-SYNC Recommended Printed Circuit Layout Diagram
26
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