LTC1734L
APPLICATIONS INFORMATION
and resulting in the IC’s junction temperature to rise
above 150°C, thus cutting off the base current to the PNP
transistor. This action will limit the transistor junction
temperature to a temperature well above 150°C. The
temperature depends on how well the IC and PNP are
thermally connected and on the transistor’s θJA. See the
External PNP Transistor section for information on pro-
tecting the transistor from overheating.
PACKAGE DESCRIPTIO
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
0.62
0.95
MAX
REF
1.22 REF
2.90 BSC
(NOTE 4)
3.85 MAX 2.62 REF
1.4 MIN
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD
FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
0.20 BSC
DATUM ‘A’
0.30 – 0.50 REF
0.95 BSC
0.80 – 0.90
1.00 MAX
0.09 – 0.20
(NOTE 3)
1.90 BSC
0.30 – 0.45
6 PLCS (NOTE 3)
0.01 – 0.10
S6 TSOT-23 0302
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PART NUMBER
DESCRIPTION
COMMENTS
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12 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507 q www.linear.com
1734lf
LT/TP 0802 2K • PRINTED IN THE USA
© LINEAR TECHNOLOGY CORPORATION 2001