LTC1743 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1743' PDF : 24 Pages View PDF
LTC1743
APPLICATIO S I FOR ATIO
Any noise present on the encode signal will result in
additional aperture jitter that will be RMS summed with the
inherent ADC aperture jitter.
In applications where jitter is critical (high input frequen-
cies) take the following into consideration:
1. Differential drive should be used.
2. Use as large an amplitude as possible; if transformer
coupled use a higher turns ratio to increase the
amplitude.
3. If the ADC is clocked with a sinusoidal signal, filter the
encode signal to reduce wideband noise.
4. Balance the capacitance and series resistance at both
encode inputs so that any coupled noise will appear at
both inputs as common mode noise.
The encode inputs have a common mode range of 1.8V to
VDD. Each input may be driven from ground to VDD for
single-ended drive.
LTC1743
5V
CLOCK
INPUT
ANALOG INPUT
0.1µF
1:4
50Ω
VDD
ENC
2V BIAS
6k
VDD
ENC
2V BIAS
6k
BIAS
TO INTERNAL
ADC CIRCUITS
1743 F07
Figure 7. Transformer Driven ENC/ENC with Equivalent Encode Input Circuit
ENC
VTHRESHOLD = 2V
2V ENC LTC1743
0.1µF
1743 F08a
Figure 8a. Single-Ended ENC Drive,
Not Recommended for Low Jitter
3.3V
MC100LVELT22 3.3V 130Ω
Q0
D0
130Ω
ENC
Q0
83Ω
ENC LTC1743
83Ω
1743 F08b
Figure 8b. ENC Drive Using a CMOS-to-PECL Translator
1743f
17
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