LTC1863L View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1863L' PDF : 16 Pages View PDF
LTC1863L/LTC1867L
APPLICATIONS INFORMATION
Total Harmonic Distortion
Total Harmonic Distortion (THD) is the ratio of the RMS
sum of all harmonics of the input signal to the fundamental
itself. The out-of-band harmonics alias into the frequency
band between DC and half the sampling frequency. THD
is expressed as:
THD = 20log V22 + V32 + V42...+ VN2
V1
where V1 is the RMS amplitude of the fundamental fre-
quency and V2 through VN are the amplitudes of the second
through Nth harmonics.
pin, REFCOMP, must be bypassed with a 10µF ceramic or
tantalum in parallel with a 0.1µF ceramic for best noise
performance.
Digital Interface
The LTC1863L and LTC1867L have a very simple digital
interface that is enabled by the control input, CS/CONV.
A logic rising edge applied to the CS/CONV input will ini-
tiate a conversion. After the conversion, taking CS/CONV
low will enable the serial port and the ADC will present
digital data in two’s complement format in bipolar mode
or straight binary format in unipolar mode, through the
SCK/SDO serial port.
Internal Reference
The LTC1863L and LTC1867L have an on-chip, tempera-
ture compensated, curvature corrected, bandgap reference
that is factory trimmed to 1.25V. It is internally connected
to a reference amplifier and is available at VREF (Pin 10).
A 3k resistor is in series with the output so that it can be
easily overdriven by an external reference if better drift
and/or accuracy are required as shown in Figure 4. The
reference amplifier gains the VREF voltage by 2x to 2.5V at
REFCOMP (Pin 9). This reference amplifier compensation
1.25V
10 VREF
2.2µF
2.5V
9 REFCOMP
R1
3k BANDGAP
REFERENCE
REFERENCE
AMP
10µF
R2
15 GND
R3
LTC1863L/LTC1867L
1863L7L F04a
Figure 4a. LTC1867L Reference Circuit
Internal Clock
The internal clock is factory trimmed to achieve a typical
conversion time of 3.2µs and a maximum conversion
time, 3.7µs, over the full operating temperature range.
The typical acquisition time is 1.68µs, and a throughput
sampling rate of 175ksps is tested and guaranteed.
Automatic Nap Mode
The LTC1863L and LTC1867L go into automatic nap
mode when CS/CONV is held high after the conversion is
complete. With a typical operating current of 750µA and
automatic 170µA nap mode between conversions, the
power dissipation drops with reduced sample rate. The
ADC only keeps the VREF and REFCOMP voltages active
when the part is in the automatic nap mode. The slower
the sample rate allows the power dissipation to be lower
(see Figure 5).
800
VDD = 2.7V
700
3V
VIN
LT1790A-1.25
VOUT
+
10µF
10
2.2µF
9
VREF
LTC1863L/
LTC1867L
REFCOMP
0.1µF
15
GND
1863L7L F04b
Figure 4b. Using the LT1790A-1.25 as an External Reference
600
500
400
300
200
100
1
10
100
fSAMPLE (ksps)
1000
1863L7L G09
Figure 5. Supply Current vs fSAMPLE
1863l7lfd
12
For more information www.linear.com/LTC1863L
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