LTC1960CUHF View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1960CUHF' PDF : 28 Pages View PDF
LTC1960
OPERATION
bit is set in the status register. This is a three-strikes-and-
you’re-out process which is intended to debounce the
PowerPath PF indicator. The power-fail counter is reset
by a PowerPath SPI write.
Short-Circuit Protection
Short-circuit protection operates in both a current mode
and a voltage mode. If the voltage between SCP and SCN
exceeds the short-circuit comparator threshold VTSC for
more than 15ms, then all of the PowerPath switches are
turned off and the FAULT bit (FA) is set. Similarly, if the
voltage at SCN falls below 3V for more than 15ms, then
all of the PowerPath switches are turned off and the FA bit
is set. The FA bit is reset by removing all power sources
and allowing the voltage at VPLUS to fall below the UVLO
threshold. If the FA bit is set, charging is disabled until
VPLUS exceeds the UVLO threshold and charging is re-
quested via the SPI interface.
When a hard short-circuit occurs, it might pull all of the
power sources down to near 0V potentials. The capacitors
on VCC and VPLUS must be large enough to keep the circuit
operating correctly during the 15ms short-circuit event.
The charger will stop within a few microseconds leaving
a small current which must be provided by the capacitor
on VPLUS. The recommended minimum values (1µF on
VPLUS and 2µF on VCC, including tolerances) should keep
the LTC1960 operating above the UVLO trip voltage long
enough to perform the short-circuit function when the
input voltages are greater than 8V. Increasing the capaci-
tor across VCC to 4.7µF will allow operation down to the
recommended 6V minimum.
Fast PowerPath Turn-Off
All of the PowerPath switches can be forced off by set-
ting the DCDIV pin to a voltage between 8V and 10V. This
will have the same effect as a short-circuit event. The PF
status bit will also be set. DCDIV must be less than 5V
and VPLUS must decrease below the UVLO threshold to
re-enable the PowerPath switches.
delay is to prevent oscillation from a turn-on transient
near the UVLO threshold.
The Voltage DAC Block
The voltage DAC (VDAC) is a delta-sigma modulator
which controls the effective value of an internal resistor,
RVSET = 7.2k, used to program the maximum charger
voltage. Figure 5 is a simplified diagram of the VDAC
operation. The charger monitor MUX is connected to the
appropriate battery indicated by the CHARGE_BATx bit.
The delta-sigma modulator and switch SWV convert the
VDAC value, received via SPI communication, to a vari-
able resistance equal to (11/8)RVSET/(VDAC(VALUE)/2047).
In regulation, VSET is servo driven to the 0.8V reference
voltage, VREF .
Therefore, programmed voltage is:
VBATx = (8/11) VREF 405.3k/7.2k • (VDAC(VALUE)/2047)
+ VREF = 32,752mV • (VDAC(VALUE)/2047) + 0.8V
Note that the reference voltage must be subtracted from
the VDAC value in order to obtain the correct output volt-
age. This value is VREF /16mV = 50 (32HEX).
Capacitors CB1 and CB2 are used to average the voltage
present at the VSET pin as well as provide a zero in the
voltage loop to help stability and transient response time
to voltage variations. See the Applications Information
section.
CB2
CSN
BAT1
CHGMON
BAT2
VSET
CB1
RVF
405.3k
VREF
RVSET
7.2k
–
EA
+
SWV
∆Σ
11
MODULATOR
TO
ITH
DAC
VALUE
(11 BITS)
1960 F05
Power-Up Strategy
All three PowerPath switches are turned on after VPLUS
exceeds the UVLO threshold for more than 250ms. This
Figure 5. Voltage DAC Operation
1960fb
17
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