LTC2217 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC2217' PDF : 32 Pages View PDF
LTC2217
APPLICATIONS INFORMATION
output may be used, but is not required since the ADC
has a series resistor of 43Ω on-chip.
Lower OVDD voltages will also help reduce interference
from the digital outputs.
VDD
DATA
FROM
LATCH
PREDRIVER
LOGIC
LTC2217
OVDD 0.5V
VDD
TO 3.6V
0.1μF
OVDD
43Ω
TYPICAL
DATA
OUTPUT
OGND
2217 F11
Figure 11. Equivalent Circuit for a Digital Output Buffer
Digital Output Buffers (LVDS Modes)
Figure 12 shows an equivalent circuit for an LVDS output
pair. A 3.5mA current is steered from OUT+ to OUT– or
vice versa, which creates a ±350mV differential voltage
across the 100Ω termination resistor at the LVDS receiver.
A feedback loop regulates the common mode output volt-
age to 1.20V. For proper operation each LVDS output pair
must be terminated with an external 100Ω termination
resistor, even if the signal is not used (such as OF+/OF– or
CLKOUT+/CLKOUT–). To minimize noise the PC board
traces for each LVDS output pair should be routed close
together. To minimize clock skew all LVDS PC board traces
should have about the same length.
In Low Power LVDS Mode 1.75mA is steered between
the differential outputs, resulting in ±175mV at the LVDS
receiver’s 100Ω termination resistor. The output com-
mon mode voltage is 1.20V, the same as standard LVDS
Mode.
Data Format
The LTC2217 parallel digital output can be selected for
offset binary or 2’s complement format. The format is
selected with the MODE pin. This pin has a four level
logic input, centered at 0, 1/3VDD, 2/3VDD and VDD. An
external resistor divider can be user to set the 1/3VDD
and 2/3VDD logic levels. Table 2 shows the logic states
for the MODE pin.
Table 2. MODE Pin Function
MODE
0(GND)
1/3VDD
2/3VDD
VDD
OUTPUT FORMAT
Offset Binary
Offset Binary
2’s Complement
2’s Complement
CLOCK DUTY
CYCLE STABILIZER
Off
On
On
Off
LTC2217
VDD
DATA
FROM
LATCH
PREDRIVER
LOGIC
3.5mA
VDD
10k
OVDD
43Ω
10k
OVDD
100Ω
43Ω
OVDD
3.3V
0.1μF
LVDS
RECEIVER
+
1.20V –
OGND
2217 F12
Figure 12. Equivalent Output Buffer in LVDS Mode
2217f
23
Share Link: 
