APPLICATIO S I FOR ATIO
500mV/DIV
MASTER
SLAVE2
SLAVE1
LTC2926
500mV/DIV
5ms/DIV
5ms/DIV
2926 F17
Figure 17. Offset Tracking Waveforms from Figure 18 Circuit
Offset Tracking Example
Converting the circuit in the coincident tracking example to
the offset tracking profile shown in Figure 17 is relatively
simple. Here the 1.8V slave supply ramps up 1V below the
master, and the 2.5V slave supply ramps up 0.5V below
the master. The ramp rate remains the same (100V/s), as
do the slave supplies’ minimum load resistances, so there
are no changes necessary to steps 1 or 2 of the three-step
1.8V MODULE
3.3V VIN
3.3V IN OUT
SENSE
RX1
100Ω
Q0
IRF7413Z
Q1
IRF7413Z
10Ω
10Ω
3.3V
MASTER
1.8V
SLAVE1
2.5V MODULE
3.3V IN OUT
SENSE
RX2
100Ω
0.1µF
CMGATE
0.1µF
Q2
IRF7413Z
10Ω
2.5V
SLAVE2
RTB1
15.0k
RTB2
15.0k
RTA1
5.36k
RTA2
VIN
4.64k
10k
FAULT
ON/OFF
VCC
D1
MGATE RAMP SGATE1 SGATE2
D2
S1
RAMPBUF
S2
TRACK1
FB1
LTC2926
TRACK2
FB2
FAULT
ON
GND
STATUS/PGI
PGTMR
RSGATE
CPGTMR
1µF
2926 F18
RFB1
15.0k
RFA1
9.53k
RFB2
15.0k
VIN
10k
RFA2
5.76k
STATUS
NC
design procedure. Only step 3 must be considered. Be
sure to verify that the chosen voltage offsets will allow
the slave supplies to ramp up completely. In this example,
if the voltage offset on the 1.8V supply were 2V, it could
ramp up only to 3.3V – 2V = 1.3V.
3. Solve for the tracking resistors that set the desired ramp
rate and voltage offset or time delay of the slave supply.
From Equation 4:
RTB
=
15.0kΩ
•
⎛
⎝⎜
100
100
V
V
s⎞
s ⎠⎟
= 15kΩ
Choose RTB = 15.0kΩ.
Since offset is required, Equation 5a applies:
ΔV = 1.0V
From Equation 6:
RTA =
0.8V
+
0.8V
0.8V − 0.8V
+
1.0V
= 5.31kΩ
15.0kΩ 9.53kΩ 15.0kΩ 15.0kΩ
Choose RTA = 5.36kΩ.
Figure 18. Offset Tracking Example
2926fa
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