LTC2942-1I View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC2942-1I
Linear Technology
'LTC2942-1I' PDF : 16 Pages View PDF
LTC2942-1
Applications Information
S ALERT RESPONSE ADDRESS R A DEVICE ADDRESS A P
0001100
10
11001001
1
29421 F08
Figure 8. LTC2942-1 Serial Bus SDA Alert Response Protocol
S ADDRESS W A REGISTER A DATA P 10ms S ADDRESS W A REGISTER A S ADDRESS R A DATA A DATA A P
1100100 0 0 01h 0 BC
1100100 0 0 08h 0 1100100 1 0 F1h 0 80h 1
29421 F09
Figure 9. Voltage Conversion Sequence
S ADDRESS W A REGISTER A S ADDRESS R A DATA A DATA A P
1100100 0 0
02h
0
1100100 1 0 80h 0 01h 1
29421 F10
Figure 10. Reading the LTC2942-1 Accumulated Charge Registers (C, D)
where TNOM = 27°C (or 300K) and RPP(TNOM) is from
the Electrical Characteristics table. This means that the
resistance between SENSE+ and SENSE– may drop by
26% if die temperature changes from 27°C to –40°C
or increase by 23% for a 27°C to 85°C die temperature
change. Ensure that total voltage drop between SENSE+
and SENSE–, caused by maximum peak current flowing
in/out of SENSE–:
VDROP = IPEAK • RPP(TDIE(MAX))
does not exceed the application’s requirements.
Limiting Inrush Current
Inrush currents during events like battery insertion or
closure of a mechanical power switch may be substan-
tially higher than peak currents during normal operation.
Extremely large inrush currents may require additional
circuitry to keep currents through the LTC2942-1 sense
resistor below the absolute maximum ratings.
Note that external Schottky clamp diodes between SENSE+
and SENSE– can leak significantly, especially at high tem-
perature, which can cause significant coulomb counter
errors. Preferred solutions to limit inrush current include
active Hot Swap™ current limiting or connector designs
that include current limiting resistance and staggered pins
to ensure a low impedance connection when the connector
is fully mated.
Power Dissipation
Power dissipation in the RPP resistance when operated
at high currents can increase the die temperature sev-
eral degrees over ambient. Soldering the exposed pad
of the DFN package to a large copper region on the PCB
is recommended for applications operating close to the
specified maximum current and ambient temperature. Die
temperature at a given ISENSE can be estimated by:
TDIE = TAMB + 1.22 • θJA • RPP(MAX) • ISENSE2
where the factor 1.22 approximates the effect of sense
resistor self-heating, RPP(MAX) is the maximum pad-to-
pad resistance at nominal temperature (27°C) and θJA is
the thermal resistance from junction to ambient. The θJA
data given for the DFN package is valid for typical PCB
layouts; more precise θJA data for a particular PCB layout
may be obtained by measuring the voltage VP-P between
SENSE+ and SENSE–, the ambient temperature TAMB, and
the die temperature TDIE, and calculating:
θJA
=
TDIE
VP-P
– TAMB
• ISENSE
Both TAMB and TDIE temperature may be measured using
the internal temperature sensor included in the LTC2942-1.
ISENSE should be set to zero to measure TAMB, and high
enough during TDIE measurement to achieve a significant
temperature increase over TAMB.
29421f
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