LTC2960CDC-4-TRMPBF View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC2960CDC-4-TRMPBF' PDF : 16 Pages View PDF
LTC2960
APPLICATIONS INFORMATION
The closest 1% resistor value is 34k. R3 is easily obtained
from:
R3 = RSUM – R1 – R2 = 8M – 499k – 34k
R3 = 7.467MΩ
The closest 1% resistor value is 7.5MΩ. Plugging the
standard values back into the equations yields the design
values for the falling reset and IN+ voltages:
VIN+ = 6.4V, VRST = 6.028V
Figure 2 demonstrates how the inputs can be biased
to monitor two voltages (V1, V2). In this example, four
resistors are required. Calculate each divider ratio for the
desired falling threshold (VFT) using:
RnB = VFT – 1= VFT – 1
RnA VTH
0.4V
In Figure 2, OUT is tied back to the MR input, making the
state of the RST output dependent upon both V1 and V2. If
V1 and V2 are both above the configured falling threshold
plus hysteresis, RST is allowed to pull high. If independent
operation of the status outputs is desired, simply omit the
OUT and MR connection.
V1
V2
R2B R1B
LTC2960-1/
LTC2960-3
ADJ
RST
IN+
R2A R1A
MR OUT
2960 F02
Figure 2. Dual Voltage Monitoring
SELECTING OUTPUT LOGIC STYLE
The LTC2960 status outputs are available in two options:
open-drain (LTC2960-1/LTC2960-2) or active pull-up with
the DVCC pin replacing the RT pin (LTC2960-3/LTC2960-4).
The open-drain option allows the outputs to be pulled up
to a user defined voltage up to 36V with a resistor. The
open-drain pull-up voltage may be greater than VCC. Select
a resistor compatible with desired output rise time and
load current specifications. Figure 3 demonstrates typical
LTC2960-1 OUT output behavior. When the status outputs
are low, power is dissipated in the pull-up resistors.
7.5
6
4.5
3
1.5
0
0
1.5
3
4.5
6
7.5
VCC (V)
2960 F03
TFhigruerseho3l.dOwUiTthvRsSVTCCTi(eLTdCto29V6C0C-1T)hEroxutegrhnaPlulyll-CuopnRfiegsuirsetdorfor 6V
The outputs of both the LTC2960-3 and LTC2960-4 can be
configured as either low voltage active pull-up or open-
drain. This is done by tying the DVCC pin to either a supply
or GND. Using the active pull-up configuration, DVCC tied
to a supply, lowers power dissipation by eliminating the
static current drawn by pull-up resistors when the outputs
are low and improves output rise time. In Figure 4(a), an
LTC2960-3 has active pull-up outputs configured by tying
DVCC to a 1.6V to 5.5V supply. In Figure 4(b), the LTC2960-3
has open-drain outputs configured by tying the DVCC pin to
ground. When DVCC is connected to ground both outputs
are open-drain and pull-up resistors are required.
Some applications require RST and/or OUT outputs to
be valid with VCC down to ground when DVCC is tied to
VCC. Active pull-up satisfies this requirement with the ad-
dition of an optional external resistor from the output to
ground. The resistor provides a path for leakage currents,
preventing the output from floating to undetermined volt-
ages when connected to high impedance (such as CMOS
logic inputs). The resistor value should be small enough to
2960f
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