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LTC2991CMS View Datasheet(PDF) - Linear Technology

Part Name
Description
MFG CO.
'LTC2991CMS' PDF : 32 Pages View PDF
LTC2991
APPLICATIONS INFORMATION
Table 6. V5, V6 and V7, V8 CONTROL (07h) Register (Default 00h)
BIT
NAME
OPERATION
b7
V7, V8 Filt
1 = Filter Enabled, 0 = Filter Disabled for V7 and V8, V7 – V8 or T4 (Default)
b6
TR4 Kelvin
1 = Kelvin, 0 = Celsius for T4 (Default)
b5
V7, V8 Temperature
1 = Temperature, 0 = Voltage (Per b4 Setting) (Default)
b4
V7, V8 Differential
1 = Differential (V7 – V8) and V7 Single-Ended
0 = Single-Ended Voltage (V7 and V8) (Default)
b3
V5, V6 Filt
1= Filter Enabled, 0 = Filter Disabled for V5 and V6, V5 – V6 or T3 (Default)
b2
TR3 Kelvin
1 = Kelvin, 0 = Celsius for T3 (Default)
b1
V5, V6 Temperature
1 = Temperature, 0 = Voltage (Per b0 Setting) (Default)
b0
V5, V6 Differential
1 = Differential (V5 – V6) and V5 Single-Ended
0 = Single-Ended Voltage (V5 and V6) (Default)
Table 7. PWM, VCC and TINTERNAL CONTROL (08h) Register (Default 00h)
BIT
NAME
OPERATION
b7
PWM[0]
PWM Threshold Least Significant Bit (Default = 0)
b6
PWM Invert*
1 = PWM Inverted, 0 = PWM Noninverted (Default)
b5
PWM Enable**
1 = PWM Enabled, 0 = PWM Disabled (Default)
b4
Repeated Acquisition
1 = Repeated Mode
0 = Single Shot (Default)
b3
TINTERNAL Filt
1 = Filter Enabled for TINTERNAL
0 = Filter Disabled TINTERNAL (Default)
b2
TINTERNAL Kelvin
1 = Kelvin, 0 = Celsius for TINTERNAL (Default)
b1
Reserved
Reserved
b0
Reserved
Reserved
* Noninverted would be an increasing duty cycle for an increasing temperature.
** If disabled and noninverted, the PWM pin will be a logic level 0. If disabled and inverted, the PWM pin will be a logic level 1.
Table 8. PWM Register Format (Default 00h)
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
D8
D7
D6
D5
D4
D3
D2
D1
Note: D0 is located in the MSB of PWM, VCC and TINTERNAL CONTROL (08h) Register
Table 9. Voltage/Current Measurement MSB Data Register Format
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
DV*
Sign
D13
D12
D11
D10
D9
D8
*Data valid is set when a new result is written into the register. Data valid is cleared
when this register is addressed (read) by the I2C interface.
Table 10. Voltage/Current Measurement LSB Data Register Format
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
D7
D6
D5
D4
D3
D2
D1
D0
2991ff
20
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