LTC3416 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC3416' PDF : 16 Pages View PDF
LTC3416
APPLICATIO S I FOR ATIO
in dropout, the heat dissipated may exceed the maximum
junction temperature of the part. If the junction tempera-
ture reaches approximately 150°C, both power switches
will be turned off and the SW node will become high
impedance.
To avoid the LTC3416 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
TR = (PD)(θJA)
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to the
ambient temperature. For the 20-lead exposed TSSOP
package, the θJA is 38°C/W.
The junction temperature, TJ, is given by:
TJ = TA + TR
where TA is the ambient temperature.
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (RDS(ON)).
To maximize the thermal performance of the LTC3416, the
Exposed Pad should be soldered to a ground plane.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current.
When a load step occurs, VOUT immediately shifts by an
amount equal to ∆ILOAD(ESR), where ESR is the effective
series resistance of COUT. ∆ILOAD also begins to charge or
discharge COUT generating a feedback error signal used by
the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability prob-
lem. The ITH pin external components and output capaci-
tor shown in figure 1a will provide adequate compensation
for most applications.
Design Example
As a design example, consider using the LTC3416 in an
application with the following specifications: VIN = 3.3V,
VOUT1 = 1.8V, VOUT2 = 2.5V, IOUT1(MAX) = IOUT2(MAX) = 4A,
f = 1MHz. VOUT1 and VOUT2 must track when powering up
and powering down.
First, calculate the timing resistor:
ROSC
=
3.08 • 1011
1• 106
–
10k
=
298k
Use a standard value of 294kΩ. Next, calculate the induc-
tor values for about 40% ripple current:
L1 =
1.8V
1MHz • 1.6A
1–
1.8V
3.3V
=
0.51µH
L2
=
2.5V
1MHz • 1.6A
1–
2.5V
3.3V
=
0.38µH
Using a 0.47µH inductor for both results in maximum
ripple currents of:
∆IL1
=
1.8V
1MHz • 0.47µH
1–
1.8V
3.3V
=
1.74A
∆IL2
=
2.5V
1MHz • 0.47µH
1–
2.5V
3.3V
=
1.29A
COUT1 and COUT2 will be selected based on the ESR that is
required to satisfy the output voltage ripple requirement
and the bulk capacitance needed for loop stability. For this
design, two 100µF ceramic capacitors will be used at each
output.
CIN1 and CIN2 should be sized for a maximum current
rating of:
IRMS1
=
4A
1.8V
3.3V
3.3V
1.8V
–
1
=
1.99ARMS
IRMS2
=
4A
2.5V
3.3V
3.3V
2.5V
–
1
=
1.71ARMS
3416f
12
Share Link: 
