LTC3548-2
APPLICATIONS INFORMATION
The output voltage, VOUT2, can now be programmed by
choosing the values of R1 and R2. To maintain high effi-
ciency, the current in these resistors should be kept small.
Choosing 2μA with the 0.6V feedback voltage makes R1
approximately 280k. A close standard 1% resistor is 280k,
and R2 is then 887k.
The POR pin is a common drain output and requires a pull-
up resistor. A 100k resistor is used for adequate speed.
Figure 3 shows the complete schematic for this design
example.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3548-2. These items are also illustrated graphically
in the layout diagram of Figure 4. Check the following in
your layout:
1. Does the capacitor CIN connect to the power VIN (Pin 3)
and GND (Exposed Pad) as close as possible? This
capacitor provides the AC current to the internal power
MOSFETs and their drivers.
2. Are the COUT and L1 closely connected? The (–) plate of
COUT returns current to GND and the (–) plate of CIN.
3. The resistor divider, R1 and R2, must be connected
between the (+) plate of COUT and a ground sense line
terminated near GND (Exposed Pad). The feedback
signals VOUT1, VFB2 should be routed away from noisy
components and traces, such as the SW line (Pins 4
and 7), and its trace should be minimized.
4. Keep sensitive components away from the SW pins. The
input capacitor CIN and the resistors R1 to R2 should be
routed away from the SW traces and the inductors.
5. A ground plane is preferred, but if not available, keep the
signal and power grounds segregated with small signal
components returning to the GND pin at one point and
should not share the high current path of CIN or COUT.
6. Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. These copper areas should be connected
to VIN or GND.
VIN
2.5V* TO 5.5V
C1
10μF
VOUT2
2.5V*
400mA
L2
4.7μH
C5 68pF
RUN2 VIN RUN1
MODE/SYNC POR
LTC3548-2
SW2
SW1
R5
100k
POWER-ON
RESET
L1
2.2μH
VOUT1
1.8V
800mA
R2
C3 887k
4.7μF
VFB2
R1
280k
VOUT1
GND
C2
10μF
C1, C2, C3: TAIYO YUDEN JMK212BJ106MG
C3: TAIYO YUDEN JMK212BJ475MG
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L1: MURATA LQH32CN2R2M11
L2: MURATA LQH32CN4R7M23
*VOUT CONNECTED TO VIN FOR VIN b 2.8V (DROPOUT)
Figure 3. LTC3548-2 Typical Application
VIN
VOUT2
C5
R2
COUT2
RUN2 VIN RUN1
CIN
MODE/SYNC
POR
LTC3548-2
L2
SW2
SW1
L1 VOUT1
VFB2
R1
VOUT1
GND
COUT1
BOLD LINES INDICATE
HIGH CURRENT PATHS
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Figure 4. LTC3548-2 Layout Diagram
(See Board Layout Checklist)
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