LTC3548EDD-2 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC3548EDD-2
Linear Technology
'LTC3548EDD-2' PDF : 16 Pages View PDF
LTC3548-2
APPLICATIONS INFORMATION
Checking Transient Response
The regulator loop response can be checked by look-
ing at the load transient response. Switching regulators
take several cycles to respond to a step in load current.
When a load step occurs, VOUT immediately shifts by an
amount equal to ΔILOAD • ESR, where ESR is the effective
series resistance of COUT. ΔILOAD also begins to charge
or discharge COUT, generating a feedback error signal
used by the regulator to return VOUT to its steady-state
value. During this recovery time, VOUT can be monitored
for overshoot or ringing that would indicate a stability
problem.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second-
order overshoot/DC ratio cannot be used to determine
phase margin. In addition, a feed forward capacitor, CF,
can be added to improve the high frequency response, as
shown in Figure 2. Capacitor CF provides phase lead by
creating a high frequency zero with R2, which improves
the phase margin.
The output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a re-
view of control loop theory, refer to Application Note 76.
In some applications, a more severe transient can be
caused by switching loads with large (>1μF) load input
capacitors. The discharged load input capacitors are ef-
fectively put in parallel with COUT, causing a rapid drop in
VOUT. No regulator can deliver enough current to prevent
this problem, if the switch connecting the load has low
resistance and is driven quickly. The solution is to limit
the turn-on speed of the load switch driver. A Hot Swap™
controller is designed specifically for this purpose and
usually incorporates current limiting, short-circuit protec-
tion, and soft-starting.
Hot Swap is a trademark of Linear Technology Corporation.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
% Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3548-2 circuits: 1) VIN quiescent current,
2) switching losses, 3) I2R losses, 4) other losses.
1. The VIN current is the DC supply current given in the
Electrical Characteristics which excludes MOSFET
driver and control currents. VIN current results in a
small (<0.1%) loss that increases with VIN, even at
no load.
2. The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from VIN to ground. The resulting dQ/dt is a current
out of VIN that is typically much larger than the DC bias
current. In continuous mode, IGATECHG = fO(QT + QB),
where QT and QB are the gate charges of the internal
top and bottom MOSFET switches. The gate charge
losses are proportional to VIN and thus their effects
will be more pronounced at higher supply voltages.
3. I2R losses are calculated from the DC resistances of
the internal switches, RSW, and external inductor, RL.
In continuous mode, the average output current flows
through inductor L, but is chopped between the internal
top and bottom switches. Thus, the series resistance
looking into the SW pin is a function of both top and
bottom MOSFET RDS(ON) and the duty cycle (D) as
follows:
RSW = (RDS(ON)TOP)(D) + (RDS(ON)BOT)(1 – D)
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