LTC3717-1
Wide Operating Range,
No RSENSETM Step-Down Controller
for DDR/QDR Memory Termination
FEATURES
s VOUT = 1/2 VREF
s Adjustable and Symmetrical Sink/Source
Current Limit up to 20A
s True Current Mode Control with Optional Use of
Sense Resistor
s VON and ION Pins Allow Constant Frequency
Operation During Input and Output Voltage Changes
s ±0.65% Output Voltage Accuracy
s Up to 97% Efficiency
s Ultrafast Transient Response
s 2% to 90% Duty Cycle at 200kHz
s tON(MIN) ≤ 100ns
s Stable with Ceramic COUT
s Power Good Output Voltage Monitor
s Wide VIN Range: 4V to 36V
s Adjustable Switching Frequency up to 1.5MHz
s Output Overvoltage Protection
s Optional Short-Circuit Shutdown Timer
s Available in a 5mm × 5mm QFN Package
U
APPLICATIO S
s Bus Termination: DDR and QDR Memory, SSTL,
HSTL, ...
s Notebook Computers, Desktop Servers
s Tracking/Margining Power Supply
DESCRIPTIO
The LTC®3717-1 is a synchronous step-down switching
regulator controller for double data rate (DDR) and Quad
Data RateTM (QDRTM) memory termination. The controller
uses a valley current control architecture to deliver very
low duty cycles with or without a sense resistor. Operating
frequency is selected by an external resistor and is com-
pensated for variations in VIN and VOUT.
Forced continuous operation reduces noise and RF inter-
ference. Output voltage is internally set to half of VREF,
which is user programmable.
Fault protection is provided by an output overvoltage
comparator and optional short-circuit shutdown timer.
Soft-start capability for supply sequencing is accom-
plished using an external timing capacitor. The regulator
current limit level is symmetrical and user programmable.
Wide supply range allows operation from 4V to 36V at the
VCC input.
, LTC and LT are registered trademarks of Linear Technology Corporation.
No RSENSE is a trademark of Linear Technology Corporation.
QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress
Semiconductor, Hitachi, IDT, Micron Technology, Inc. and Samsung.
TYPICAL APPLICATIO
VCC
5V TO 28V
1µF
0.1µF
470pF
20k
VCC ION
VREF
RUN/SS TG
LTC3717-1
SW
SENSE+
ITH
BOOST
SGND
VON
DRVCC
INTVCC
BG
PGOOD PGND
SENSE–
VFB
715k
VDD = 2.5V
0.22µF
CMDSH-3
+
4.7µF
Si7840DP
Si7840DP
B320A
VIN
2.5V TO 5.5V
+ 150µF
6.3V
×2
VOUT
1.25V
0.68µH + 180µF ±10A
4V
×2
B320A
37171 F01a
Figure 1. High Efficiency DDR Memory Termination Supply
Efficiency vs Load Current
100
90
80
70
60
50
40
30
20
10
0
0
VIN = 5V
VIN = 2.5V
VOUT = 1.25V
2 4 6 8 10 12 14
LOAD CURRENT (A)
37171 F01b
sn37171 37171fs
1