LTC3778 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC3778' PDF : 24 Pages View PDF
LTC3778
APPLICATIO S I FOR ATIO
• Segregate the signal and power grounds. All small
signal components should return to the SGND pin at
one point which is then tied to the PGND pin close to the
source of M2.
• Place M2 as close to the controller as possible, keeping
the PGND, BG and SW traces short.
• Connect the input capacitor(s) CIN close to the power
MOSFETs. This capacitor carries the MOSFET AC cur-
rent.
• Keep the high dV/dT SW, BOOST and TG nodes away
from sensitive small-signal nodes.
• Connect the INTVCC decoupling capacitor CVCC closely
to the INTVCC and PGND pins.
• Connect the top driver boost capacitor CB closely to the
BOOST and SW pins.
• Connect the VIN pin decoupling capacitor CF closely to
the VIN and PGND pins.
TYPICAL APPLICATIO S
Figure 10 shows a DDR memory termination application in
which the output can sink and source up to 6A of current.
The resistive divider of R1 and R2 are meant to introduce
an offset to the SENSE– pin so that the current limit is
symmetrical during both sink and source.
CSS
0.1µF
LTC3778
1 RUN/SS
20
BOOST
2 VON
RPG
100k 3 PGOOD
19
TG
18
SW
DB
CMDSH-3
CB
0.22µF
CC1
1500pF
RC
20k
CC2
100pF
4 VRNG
5
ITH
6 FCB
SENSE+ 17
SENSE– 16
15
PGND
R1
1.2k
R2
68Ω
CON, 0.01µF
R1
12.7k
RON
227k
R2
11.7k
7 SGND
14
BG
8 ION
13
DRVCC
9 VFB
12
INTVCC
10 EXTVCC
11
VIN
CVCC
4.7µF
RF
1Ω
CF
0.1µF
M1
IRF7811
L1, 1.8µH
CIN
10µF
35V
×3
M2
IRF7811
+ COUT1-2
180µF
4V
×2
D1
B340A
VIN
5V TO 25V
330µF
25V,
SANYO
ELECTROLYTIC
VOUT
1.25V
±6A
COUT3
22µF
6.3V
X7R
CIN: UNITED CHEMICON THCR60EIHI06ZT
COUT1-2: CORNELL DUBILIER ESRE181E04B
L1: SUMIDA CEP125-1R8MC-H
3778 F11
Figure 10. 1.25V/±6A Sink and Source at 550kHz
3778f
21
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