Qdatasheet_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

LTC4067 View Datasheet(PDF) - Linear Technology

Part Name
Description
MFG CO.
'LTC4067' PDF : 20 Pages View PDF
LTC4067
APPLICATIO S I FOR ATIO
NTC thermistor, RCOLD, increases to 2.82 times the value
or RNOM. (For a Vishay NTHS0603N02N1002 thermistor
this value is 28.2k which corresponds to a temperature of
approximately 0°C). The hot and cold comparators each
have approximately 3°C of hysteresis to prevent oscillation
about the trip points.
Fault Conditions
The CHRG pin is used to signal two distinct fault condi-
tions: NTC faults and bad battery faults. Both of these
conditions are signaled at the CHRG pin with a series of
serrated open-drain pull-down pulses that are intended
to produce a visible “blinking” at an LED tied to this pin
as well as to produce a pulse train that is detectable to a
microprocessor input connected to this pin. The serrated
pulses are described with the aid of Figure 3, assuming
that the CHRG pin is connected to a positive rail with a
resistive pull-up. When an NTC fault condition is detected
during a normal charge cycle, the CHRG pin immediately
goes from a strong open-drain pull down to a high-im-
pedance state that pulses on for 1.4μs and then off at a
35kHz rate. This signal is further modulated by a 1.5Hz
blink frequency that reverses from pulsing high-to-low to
pulsing low-to-high.
V (CHRG)
PW = 27.7μs (NTC FAULT)
TS
26.3μs (BAD BAT)
Table 3 illustrates the four possible states of the CHRG
pin when the battery charger is active.
Table 3. CHRG Output Pin
STATUS
FREQUENCY
MODULATION
(BLINK)
FREQUENCY
DUTY CYCLE
Charging
0Hz
0Hz (Lo-Z)
100%
IBAT < ICC-CHG/10
NTC Fault
0Hz
35kHz
0Hz (Hi-Z)
0%
1.5Hz at 50% 4.7% to 95.3%
Bad Battery
35kHz
6.1Hz at 50% 9.4% to 90.6%
A bad battery fault has a 2.8μs pulse at the same rate that
is modulated by a 6Hz blink frequency. As the CHRG pin
immediately changes state upon entering a failure mode, a
microprocessor observing this pin detects the fault condi-
tion within 29μs of the failure occurring, by measuring the
pulse width. Furthermore the blink frequency is visually
detected by hooking this signal up to an LED.
When connecting a microprocessor with a positive logic
suppy that is different than the LED anode, a diode must
be inserted in series with the microcontroller input so as
to aviod the condition where the LED may inadvertantly
power up the microcontroller. A circuit that allows visual
fault and/or charge status as well as providing a safe
microcontroller interface is shown in Figure 4.
OUT
VLOGIC
PW = 1.3μs OR
2.7μs
TS = 667ms/2 (NTC FAULT)
167ms/2 (BAD BAT)
NORMAL
CHARGING
FAULT
CONDITION
Figure 3
4067 F03
LTC4067
TO MICRO
4067 F04
CHRG
Figure 4. CHRG Pin Connection to Drive a Microcontroller at the
Same Time as Providing a Visual Fault and/or Charge Status
4067f
16
Share Link: GO URL

All Rights Reserved © qdatasheet.com  [ Privacy Policy ] [ Contact Us ]