LTC4085EDE-3 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC4085EDE-3
Linear Technology
'LTC4085EDE-3' PDF : 24 Pages View PDF
LTC4085-3/LTC4085-4
OPERATION
For example, if the full charge current is programmed
to 500mA with a 100k PROG resistor the CHRG pin will
change state at a battery charge current of 50mA.
Note: The end-of-charge (EOC) comparator that moni-
tors the charge current latches its decision. Therefore,
the first time the charge current drops below 10% of the
programmed full charge current while in constant-voltage
mode will toggle CHRG to a high impedance state. If, for
some reason, the charge current rises back above the
threshold the CHRG pin will not resume the strong pull-
down state. The EOC latch can be reset by a recharge cycle
(i.e. VBAT drops below the recharge threshold) or toggling
the input power to the part.
Current Limit Undervoltage Lockout
An internal undervoltage lockout circuit monitors the
input voltage and disables the input current limit circuits
until VIN rises above the undervoltage lockout threshold.
The current limit UVLO circuit has a built-in hysteresis of
125mV. Furthermore, to protect against reverse current in
the power MOSFET, the current limit UVLO circuit disables
the current limit (i.e. forces the input power path to a high
impedance state) if VOUT exceeds VIN. If the current limit
UVLO comparator is tripped, the current limit circuits will
not come out of shutdown until VOUT falls 50mV below
the VIN voltage.
Charger Undervoltage Lockout
An internal undervoltage lockout circuit monitors the VOUT
voltage and disables the battery charger circuits until
VOUT rises above the undervoltage lockout threshold. The
battery charger UVLO circuit has a built-in hysteresis of
125mV. Furthermore, to protect against reverse current
in the power MOSFET, the charger UVLO circuit keeps the
charger shut down if VBAT exceeds VOUT. If the charger
UVLO comparator is tripped, the charger circuits will not
come out of shutdown until VOUT exceeds VBAT by 50mV.
Finally, the LTC4085-3 will attempt to prevent a VOUT UVLO
condition by reducing charge current when VOUT falls below
approximately 4.45V. Charge current is reduced to zero
when VOUT falls to approximately 4.2V. The LTC4085-4
does not include this Undervoltage Current Limit feature.
Suspend
The LTC4085 can be put in suspend mode by forcing the
SUSP pin greater than 1.2V. In suspend mode the ideal
diode function from BAT to OUT is kept alive. If power is
applied to the OUT pin externally (i.e., a wall adapter is
present) then charging will be unaffected. Current drawn
from the IN pin is reduced to 50μA. Suspend mode is
intended to comply with the USB power specification
mode of the same name.
NTC Thermistor—Battery Temperature Charge
Qualification
The battery temperature is measured by placing a nega-
tive temperature coefficient (NTC) thermistor close to
the battery pack. The NTC circuitry is shown in Figure 4.
To use this feature, connect the NTC thermistor (RNTC)
between the NTC pin and ground and a resistor (RNOM) from
the NTC pin to VNTC. RNOM should be a 1% resistor with
a value equal to the value of the chosen NTC thermistor at
25°C (this value is 10k for a Vishay NTHS0603N02N1002J
thermistor). The LTC4085 goes into hold mode when the
resistance (RHOT) of the NTC thermistor drops to 0.48
times the value of RNOM, or approximately 4.8k, which
should be at 45°C. The hold mode freezes the timer and
stops the charge cycle until the thermistor indicates a
return to a valid temperature. As the temperature drops,
the resistance of the NTC thermistor rises. The LTC4085 is
designed to go into hold mode when the value of the NTC
thermistor increases to 2.82 times the value of RNOM. This
resistance is RCOLD. For a Vishay NTHS0603N02N1002J
thermistor, this value is 28.2k which corresponds to ap-
proximately 0°C. The hot and cold comparators each have
approximately 2°C of hysteresis to prevent oscillation
about the trip point. Grounding the NTC pin will disable
the NTC function.
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