LTC4099EUDC View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC4099EUDC' PDF : 36 Pages View PDF
LTC4099
Applications Information
High value, low ESR multilayer ceramic chip capacitors
reduce the constant-voltage loop phase margin, possibly
resulting in instability. Ceramic capacitors up to 100µF may
be used in parallel with a battery, but larger ceramics should
be decoupled with 0.2Ω to 1Ω of series resistance.
Furthermore, a 100µF MLCC in series with a 0.3Ω resistor
or a 100µF OS-CON capacitor from BAT to GND is required
to prevent oscillation when the battery is disconnected.
In constant-current mode, the PROG pin is in the feed-
back loop rather than the battery voltage. Because of the
additional pole created by any PROG pin capacitance,
capacitance on this pin must be kept to a minimum. With
no additional capacitance on the PROG pin, the charger is
stable for program resistor values as high as 25k. However,
additional capacitance on this node reduces the maximum
allowed program resistor. The pole frequency at the PROG
pin should be kept above 100kHz. Therefore, if the PROG
pin has a parasitic capacitance, CPROG, the following equa-
tion should be used to calculate the maximum resistance
value for RPROG:
RPROG
≤
2π
•
1
100kHz
•
CPROG
Typical Applications
High Efficiency USB/Automotive Battery Charger with Overvoltage Protection,
Reverse-Voltage Protection and Low Battery Start-Up
AUTOMOTIVE,
FIREWIRE, ETC.
USB
M1, M2, M4: Si2333DS
M3: NTLJS4114N
M1
R1
R3
7
1
C1
VIN
8
BOOST SW
D1
4.7µF
50V
4 ILIM
R2
27.4k
GND
9
LT3653
VC HVOK
3
2
ISENSE 6
5
VOUT
L2
3.3µH
D3
M3
M2
R4
6.2k
3
TO µC
TO µC
13
C3
22µF
0805 1
20
15-17
8
VBUS
OVGATE
OVSENS
I2C
IRQ
4
5
VC
WALL
LTC4099
18 14
ACPR SW
VOUT 12
IDGATE 10
BAT 11
3 NTCBIAS
R5
100k
2 NTC
CLPROG PROG GND BATSENS
C2
0.1µF
10V
L1
4.7µH
D2
SYSTEM
LOAD
M4
C5
22µF
0805
T
R6
100k
C4
0.1µF
0603
19
R7
3.01k
7 9, 21 6
R8
1.02k
Li-Ion +
4099 TA02
4099fd
31
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