LTC4370IMSTRPBF View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC4370IMSTRPBF' PDF : 20 Pages View PDF
LTC4370
Applications Information
in the absence of load current the differential input volt-
age to the error amplifier is zero and the COMP current is
gm(EA) • VEA(OS). Before sharing can start, the COMP
voltage has to slew towards its operating point of 0.7V
(when VIN1 < VIN2) or 1.24V (VIN1 > VIN2). This delay is
determined by the differential input signal to the error
amplifier (which is ΔVOUT = OUT1 – OUT2 = (I1 − I2) • RS),
its gm and the COMP capacitor value. Depending on how
the currents split before converging, the delay can vary
from 1 to 5 times:
CC • ΔVCOMP
gm(EA) • IL • RS
Figure 4a shows the case where a 5.1V VIN1 is turned
on while VIN2 is at 4.9V supplying 10A. Initially, COMP
is railed low to 0.1V since ΔVOUT (−I2 • RS) is negative,
and needs to rise to 1.24V as the final VIN1 is higher than
VIN2. With VIN1 off, ΔVIN is large and negative, causing the
forward regulation voltage of the second supply VFR2 to be
folded back to the minimum VFR(MIN) (travelling from left
to right in Figure 2a). As the ΔVIN magnitude decreases,
VFR2 rises to the maximum VFR(MAX), lowering I2 and the
load voltage. COMP is around 0.7V when VFR2 is being
adjusted. When COMP reaches 1.24V, VFR2 is kept at the
minimum and VFR1 is adjusted appropriately to compensate
for the 0.2V of ΔVIN. The sharing closure is smoother for
the case where VIN1 < VIN2 since COMP only has to slew
to 0.7V to lower VFR2 (Figure 4b).
MOSFET Selection
The LTC4370 drives N-channel MOSFETs to conduct the
load current. The important parameters of the MOSFET
are its maximum drain-source voltage BVDSS, maximum
gate-source voltage VGS(MAX), on-resistance RDS(ON), and
maximum power dissipation PD(MAX).
If an input is connected to ground, the full supply voltage
can appear across the MOSFET. To survive this, the BVDSS
must be higher than the supply voltages. The VGS(MAX)
rating of the MOSFET should exceed 14V since that is the
upper limit of the internal GATE to VIN clamp.
To obtain the maximum sharing capture range, the RDS(ON)
should be low enough for the servo amplifier to regulate the
minimum forward regulation voltage across the MOSFET
while it’s conducting half of the load current. If it cannot,
the gate voltage will be railed high. Hence, the RDS(ON) value
in the MOSFET data sheet should be looked up for 10V or
4.5V gate drive depending on the VIN voltage. Since the
OUT voltages are equal, the breakpoint for exact sharing
in the higher RDS(ON) case is:
ΔVIN(SH) = VFR(MAX) – 0.5IL • RDS(ON)
(2)
I2
CURRENT
5A/DIV
I1
VIN1 = 5.1V
VIN2 = 4.9V
IL = 10A
I2
CURRENT
5A/DIV
I1
VIN1 = 4.9V
VIN2 = 5.1V
IL = 10A
VOLTAGE
2V/DIV
OUT
VIN1
COMP
(1V/DIV)
VOLTAGE
2V/DIV
OUT
VIN1
COMP
(0.5V/DIV)
25ms/DIV
(4a) VIN1 > VIN2
4370 F04a
25ms/DIV
(4b) VIN1 < VIN2
4370 F04b
Figure 4. Start of Sharing at VIN1 Turn-On
4370f
11
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