LTC4441 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC4441' PDF : 16 Pages View PDF
LTC4441/LTC4441-1
Applications Information
The total supply current, IQ(TOT), consists of the LTC4441/
LTC4441-1’s static quiescent current, IQ, and the current
required to drive the gate of the power MOSFET, with
thelatter usually much higher than the former. The dissi-
pated power, PD, includes the efficiency loss of the DRVCC
regulator. With a programmed DRVCC, a high VIN results
in higher efficiency loss.
As an example, consider an application with VIN = 12V.
The switching frequency is 300kHz and the maximum
ambient temperature is 70°C. The power MOSFET chosen
is three pieces of IRFB31N20D, which has a maximum
RDS(ON) of 82mΩ (at room temperature) and a typical
total gatecharge of 70nC (the temperature coefficient of
the gate charge is low).
IQ(TOT) = 500µA + 210nC • 300kHz = 63.5mA
PIC = 12V • 63.5mA = 0.762W
TJ = 70°C + 38°C/W • 0.762W = 99°C
This demonstrates how significant the gate charge cur-
rent can be when compared to the LTC4441/LTC4441-1’s
static quiescent current. To prevent the maximum junc-
tion temperature from being exceeded, the input supply
current must be checked when switching at high VIN. A
tradeoff between the operating frequency and the size of
the power MOSFET may be necessary to maintain areliable
LTC4441/LTC4441-1 junction temperature. Prior to lower-
ing the operating frequency, however, be sure to check with
power MOSFET manufacturers for their innovations on low
QG, low RDS(ON) devices. Power MOSFET manufacturing
technologies are continually improving, with newer and
better performing devices being introduced.
PC Board Layout Checklist
When laying out the printed circuit board, the following-
checklist should be used to ensure proper operation of
the LTC4441/LTC4441-1:
A. Mount the bypass capacitors as close as possible be-
tween the DRVCC and PGND pins and between the VIN
and SGND pins. The PCB trace loop areas should be
tightened as much as possible to reduce inductance.
B. Use a low inductance, low impedance ground plane to
reduce any ground drop. Remember that the LTC4441/
LTC4441-1 switches 6A peak current and any significant
ground drop will degrade signal integrity.
C. Keep the PCB ground trace between the LTC4441/
LTC4441-1 ground pins (PGND and SGND) and the
external current sense resistor as short and wide as
possible.
D. Plan the ground routing carefully. Know where the large
load switching current paths are. Maintain separate
ground return paths for the input pin and output pin
to avoid sharing small-signal ground with large load
ground return. Terminate these two ground traces only
at the GND pin of the driver (STAR network).
E. Keep the copper trace between the driver output pin
andthe load short and wide.
F. Place the small-signal components away from the high
frequency switching nodes. These components include
the resistive networks connected to the FB, RBLANK
and EN/SHDN pins.
44411fa
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