LTC5540 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC5540' PDF : 16 Pages View PDF
LTC5540
Applications Information
The nominal LO input level is 0dBm although the limiting
amplifiers will deliver excellent performance over a ±6dBm
input power range. LO input power greater than 6dBm
may cause conduction of the internal ESD diodes. Series
capacitors C3 and C4 optimize the input match and provide
DC blocking.
The LO1 input impedance and input reflection coefficient,
versus frequency, is shown in Table 3. The LO2 port
is identical due to the symmetric device layout and
packaging.
Table 3. LO1 Input Impedance vs Frequency
(at Pin 11, No External Matching, LOSEL = Low)
FREQUENCY
(GHz)
INPUT
IMPEDANCE
S11
MAG
ANGLE
0.6
48.9 + j30.6
0.3
74.9
0.7
62.8 + j29.4
0.28
51.9
0.8
78.0 + j17.2
0.25
23.9
0.9
80.4 – j4.55
0.24
– 6.5
1.0
68.3 – j20.5
0.23
–38.4
1.1
54.6 – j24.1
0.23
–66.3
1.2
44.7 – j22.3
0.24
–90.1
1.3
38.1 – j18.7
0.25
–110.5
1.4
33.8 – j14.9
0.26
–127.3
IF Output
The IF amplifier, shown in Figure 7, has differential open-
collector outputs (IF+ and IF–), a DC ground return pin
(IFGND), and a pin for modifying the internal bias (IFBIAS).
The IF outputs must be biased at the supply voltage (VCCIF),
which is applied through matching inductors L1 and L2.
Alternatively, the IF outputs can be biased through the
center tap of a transformer. Each IF output pin draws
approximately 48mA of DC supply current (96mA total).
Resistor R2 is used to improve the impedance match.
IFGND (pin 16) must be grounded or the amplifier will
not draw DC current. Grounding through inductor L3
improves LO-IF and RF-IF leakage performance but is
otherwise not necessary. High DC resistance in L3 will
reduce the IF amplifier supply current, which will degrade
RF performance.
For optimum single-ended performance, the differential
IF outputs must be combined through an external IF
12
R1
(OPTION TO
REDUCE
DC POWER)
L1
VCCIF
T1
4:1
C10
L2
C8
IFOUT
96mA L3 (OR SHORT)
IFBIAS 20 19 IF+
R2
IF– 18 16 IFGND
VCC
IF
AMP
4mA
BIAS
LTC5540
5540 F07
Figure 7. IF Amplifier Schematic with Bandpass Match
transformer or discrete IF balun circuit. The evaluation
board (see Figures 1 and 2) uses a 4:1 ratio IF transformer
for impedance transformation and differential to single-
ended transformation. It is also possible to eliminate the
IF transformer and drive differential filters or amplifiers
directly.
The IF output impedance can be modeled as 320Ω in
parallel with 2.3pF at IF frequencies. An equivalent small-
signal model (including bondwire inductance) is shown in
Figure 8. Frequency-dependent differential IF output
impedance is listed in Table 4. This data is referenced
to the package pins (with no external components) and
includes the effects of IC and package parasitics.
19 IF+
18 IF –
0.9nH
RIF
CIF
0.9nH
LTC5540
5540 F08
Figure 8. IF Output Small-Signal Model
5540f
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