LTC6803 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC6803' PDF : 40 Pages View PDF
LTC6803-1/LTC6803-3
APPLICATIONS INFORMATION
NEXT HIGHER GROUP
OF 7 CELLS
100
+
+
+
+
+
+
+
NEXT LOWER GROUP
OF 7 CELLS
V+
C12
S12
C11
S11
C10
S10
C9
S9
C8
S8
C7
S7 LTC6803-1
C6
S6
C5
S5
C4
S4
C3
S3
C2
S2
C1
S1
V–
NEXT HIGHER GROUP
OF 7 CELLS
100
+
+
+
+
+
+
+
NEXT LOWER GROUP
OF 7 CELLS
V+
C12
S12
C11
S11
C10
S10
C9
S9
C8
S8
C7
S7 LTC6803-3
C6
S6
C5
S5
C4
S4
C3
S3
C2
S2
C1
S1
C0
V–
680313 F13
Figure 13. Monitoring 7 Cells with the LTC6803-1/LTC6803-3
Table 15. LTC6803-1/LTC6803-3 Failure Mechanism Effect Analysis
SCENARIO
EFFECT
Cell input open-circuit (random). Power-up sequence at IC inputs.
Cell input open-circuit (random). Differential input voltage overstress.
Disconnection of a harness
between a group of battery cells
and the IC (in a system of stacked
groups).
Data link disconnection between
stacked LTC6803 units.
Cell-pack integrity, break between
stacked units.
Loss of supply connection to the IC.
Break of "daisy-chain" communication (no stress to
ICs). Communication will be lost to devices above the
disconnection. The devices below the disconnection
are still able to communicate and perform all functions,
however, the polling feature is disabled.
Daisy-chain voltage reversal up to full stack potential
during pack discharge.
Cell-pack integrity, break between
stacked units.
Cell-pack integrity, break within
stacked unit.
Daisy-chain positive overstress during charging.
Cell input reverse overstress during discharge.
Cell-pack integrity, break within Cell input positive overstress during charge.
stacked unit.
DESIGN MITIGATION
Clamp diodes at each pin to V+ and V– (within IC) provide
alternate power path.
Zener diodes across each cell voltage input pair (within IC)
limits stress.
Separate power may be supplied by a local supply.
All units above the disconnection will enter standby mode
within 2 seconds of disconnect. Discharge switches are
disabled in standby mode.
Use series protection diodes with top-port I/O connections
(RS07J for up to 600V). Use isolated data link at bottom-
most data port.
Add redundant current path link. See Figure 14.
Add parallel Schottky diodes across each cell for load-
path redundancy. Diode and connections must handle full
operating current of stack, will limit stress on IC.
Add SCR across each cell for charge-path redundancy. SCR
and connections must handle full charging current of stack,
will limit stress on IC by selection of trigger Zener.
680313f
30
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