LTC6948IUFD-1 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC6948IUFD-1
Linear Technology
'LTC6948IUFD-1' PDF : 36 Pages View PDF
LTC6948
Operation
Table 5. LKCT[1:0] Programming
LKCT[1:0]
0
1
2
3
COUNTS
Lock Indicator Disabled
32
256
2048
When the PFD phase difference is greater than tLWW, the
lock indicator immediately asserts the UNLOCK status
flag and clears the LOCK flag, indicating an out-of-lock
condition. The UNLOCK flag is immediately de-asserted
when the phase difference is less than tLWW. See Figure 3
for more details.
Note that fREF must be present for the LOCK and UNLOCK
flags to properly assert and clear.
+tLWW
PHASE
DIFFERENCE 0
AT PFD
–tLWW
UNLOCK FLAG
LOCK FLAG
t = COUNTS/fPFD
6948 F03
Figure 3. UNLOCK and LOCK Timing
Charge Pump
The charge pump, controlled by the PFD, forces sink
(DOWN) or source (UP) current pulses onto the CP pin,
which should be connected to an appropriate loop filter.
See Figure 4 for a simplified schematic of the charge pump.
The output current magnitude ICP may be set from 1mA to
11.2mA using the CP[2:0] bits found in serial port register
h0C. A larger ICP can result in lower in-band noise due
UP
CPUP
VCP+
CPMID
VCP+/2
DOWN
CPDN
VCP+
+– 0.9V
–
+
THI
ICP
CP 26
–
+
TLO
+– 0.9V
VCP+
CP[2:0]
ND[9:0]
CPINV
INTN
CPLE
CP LINEARIZER
CONTROL
ENABLE
ILIN
6948 F04
Figure 4. Simplified Charge Pump Schematic
to the lower impedance of the loop filter components,
although currents larger than 5.6mA typically cause worse
spurious performance. See Table 6 for programming
specifics and the Applications Information section for
loop filter examples.
Table 6. CP[2:0] Programming
CP[2:0]
0
1
2
3
4
5
6
7
ICP
1.0mA
1.4mA
2.0mA
2.8mA
4.0mA
5.6mA
8.0mA
11.2mA
The CPINV bit found in register h0D should be set for ap-
plications requiring signal inversion from the PFD, such as
for complex external loops using an inverting op amp. A
passive loop filter as shown in Figure 13 requires CPINV = 0.
6948f
16
For more information www.linear.com/LTC6948
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