LTM4601HVV View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTM4601HVV' PDF : 28 Pages View PDF
LTM4601HV
APPLICATIONS INFORMATION
The typical LTM4601HV application circuits are shown in
Figures  19 and 20. External component selection is primar-
ily determined by the maximum load current and output
voltage. Refer to Table 2 for specific external capacitor
requirements for a particular application.
VIN to VOUT Step-Down Ratios
There are restrictions in the maximum VIN to VOUT step
down ratio that can be achieved for a given input voltage.
These constraints are shown in the Typical Performance
Characteristics curves labeled VIN to VOUT Step-Down
Ratio. Note that additional thermal derating may apply. See
the Thermal Considerations and Output Current Derating
section of this data sheet.
Output Voltage Programming and Margining
The PWM controller has an internal 0.6V reference voltage.
As shown in the Block Diagram, a 1M and a 60.4k 0.5%
internal feedback resistor connects VOUT and VFB pins
together. The VOUT_LCL pin is connected between the 1M
and the 60.4k resistor. The 1M resistor is used to protect
against an output overvoltage condition if the VOUT_LCL
pin is not connected to the output, or if the remote sense
amplifier output is not connected to VOUT_LCL. In these
cases, the output voltage will default to 0.6V. Adding a
resistor RSET from the VFB pin to SGND pin programs
the output voltage:
VOUT
=
0.6V
60.4k +RSET
RSET
or equivalently:
RSET
=

ï£ï£¬
60.4k
VOUT −
0.6V
1
Table 1. RSET Standard 1% Resistor Values vs VOUT
RSET
(kΩ)
Open
60.4
40.2
30.1 25.5
19.1
13.3
8.25
VOUT
(V)
0.6
1.2
1.5
1.8
2
2.5 3.3
5
The MPGM pin programs a current that when multiplied
by an internal 10k resistor sets up the 0.6V reference ±
offset for margining. A 1.18V reference divided by the
RPGM resistor on the MPGM pin programs the current.
Calculate VOUT(MARGIN):
VOUT(MARGIN)
=
%VOUT
100
• VOUT
where %VOUT is the percentage of VOUT you want to
margin, and VOUT(MARGIN) is the margin quantity in volts:
RPGM
=
VOUT
0.6V
•
1.18V
VOUT(MARGIN)
• 10k
where RPGM is the resistor value to place on the MPGM
pin to ground.
The margining voltage, VOUT(MARGIN), will be added or
subtracted from the nominal output voltage as determined
by the state of the MARG0 and MARG1 pins. See the truth
table below:
MARG1
LOW
LOW
HIGH
HIGH
MARG0
LOW
HIGH
LOW
HIGH
MODE
NO MARGIN
MARGIN UP
MARGIN DOWN
NO MARGIN
Input Capacitors
LTM4601HV module should be connected to a low AC
impedance DC source. Input capacitors are required to
be placed adjacent to the module. In Figure 20, the 10µF
ceramic input capacitors are selected for their ability to
handle the large RMS current into the converter. An input
bulk capacitor of 100µF is optional. This 100µF capacitor
is only needed if the input source impedance is compro-
mised by long inductive leads or traces.
For a buck converter, the switching duty-cycle can be
estimated as:
D=
VOUT
VIN
4601hvfb
11
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