LTM4601HVV View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTM4601HVV
Linear Technology
'LTM4601HVV' PDF : 30 Pages View PDF
LTM4601HV
APPLICATIONS INFORMATION
The minimum on-time is above 100ns at 28V input. Since
the switching frequency is approximately constant over
input and output conditions, then the lower input voltage
range is limited to 10V for the 1.24MHz operation due to
the 400ns minimum off-time. Equation: tON = (VOUT/VIN)
• (1/Frequency) equates to a 400ns on-time, and a 400ns
off-time. The “VIN to VOUT Step-Down Ratio Curve” reflects
an operating range of 10V to 28V for 1.24MHz operation
with a 100k resistor to ground as shown in Figure 18, and
an 8V to 16V operation for fSET floating. These modifica-
tions are made to provide wider input voltage ranges for
the 5V output designs while limiting the inductor ripple
current, and maintaining the 400ns minimum off-time.
Example for 3.3V Output
LTM4601HV minimum on-time = 100ns
tON = ((VOUT • 10pF)/IfSET)
LTM4601HV minimum off-time = 400ns
tOFF = t – tON, where t = 1/Frequency
Duty Cycle (DC) = tON/t or VOUT/VIN
Equations for setting frequency:
IfSET = (VIN/(3 • RfSET)), for 28V operation, IfSET = 238µA,
tON = ((3.3 • 10pF)/IfSET), tON = 138.7ns, where the internal
RfSET is 39.2k. Frequency = (VOUT/(VIN • tON)) = (3.3V/(28 •
138.7ns)) ~ 850kHz. The minimum on-time and minimum
off-time are within specification at 139ns and 1037ns. The
4.5V minimum input for converting 3.3V output will not
meet the minimum off-time specification of 400ns. tON =
868ns, Frequency = 850kHz, tOFF = 315ns.
Solution
Lower the switching frequency at lower input voltages to
allow for higher duty cycles, and meet the 400ns minimum
off-time at 4.5V input voltage. The off-time should be about
500ns, which includes a 100ns guard band. The duty cycle
for (3.3V/4.5V) = ~73%. Frequency = (1 – DC)/tOFF or
(1 – 0.73)/500ns = 540kHz. The switching frequency
needs to be lowered to 540kHz at 4.5V input. tON = DC/
frequency, or 1.35µs. The fSET pin voltage compliance
is 1/3 of VIN, and the IfSET current equates to 38µA with
the internal 39.2k. The IfSET current needs to be 24µA for
540kHz operation. As shown in Figure 19, a resistor can
be placed from VOUT to fSET to lower the effective IfSET
current out of the fSET pin to 24µA. The fSET pin is 4.5V/3
=1.5V and VOUT = 3.3V, therefore 130k will source 14µA
into the fSET node and lower the IfSET current to 24µA.
This enables the 540kHz operation and the 4.5V to 28V
input operation for down converting to 3.3V output. The
frequency will scale from 540kHz to 1.1 MHz over this
input range. This provides for an effective output current
of 8A over the input range.
VIN
10V TO 28V
C2
10µF
35V
VOUT
R2 R4
100k 100k
5% MARGIN
R1
392k
1%
C1
10µF
35V
TRACK/SS CONTROL
VIN
PGOOD
PLLIN TRACK/SS
VOUT
MPGM
RUN
VFB
MARG0
COMP
INTVCC
LTM4601HV MARG1
VOUT_LCL
DRVCC
DIFFVOUT
VOSNS+
VOSNS–
SGND PGND fSET
REVIEW TEMPERATURE
DERATING CURVE
+
RfSET
100k
RSET
8.25k
C3
100µF
6.3V
SANYO
POSCAP
VOUT
5V
8A
22µF
6.3V
REFER TO
TABLE 2
IMPROVE
EFFICIENCY
FOR ≥12V INPUT
MARGIN CONTROL
SOT-323
DUAL
CMSSH-3C3
4601HV F18
Figure 18. 5V at 8A Design Without Differential Amplifier
4601hvfb
21
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