LTM4606 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTM4606' PDF : 28 Pages View PDF
LTM4606
APPLICATIONS INFORMATION
MASTER OUTPUT
OUTPUT
VOLTAGE
SLAVE OUTPUT
TIME
4606 F05
Figure 5. Coincident Tracking Characteristics
Run Enable
The RUN pin is used to enable the power module. The
pin has an internal 5.1V zener to ground. The pin can be
driven with a logic input not to exceed 5V.
The RUN pin can also be used as an undervoltage lock out
(UVLO) function by connecting a resistor divider from the
input supply to the RUN pin:
VUVLO
=
R1+ R2
R2
•
1.5V
where R2 is the bottom resistor of the divider, R1 is the
top resistor of the divider.
Power Good
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a ±10% window around the regulation point and tracks
with margining.
COMP Pin
This pin is the external compensation pin. The module
has already been internally compensated for most output
voltages. Table 2 is provided for most application require-
ments. A Linear Technology ÎĽModule design tool will be
provided for other control loop optimization.
FCB Pin
The FCB pin determines whether the bottom MOSFET
remains on when current reverses in the inductor. Tying
this pin above its 0.6V threshold enables discontinuous
operation where the bottom MOSFET turns off when in-
ductor current reverses. FCB pin below the 0.6V threshold
forces continuous synchronous operation, allowing current
to reverse at light loads and maintain low output ripple.
PLLIN
The power module has a phase-locked loop comprised of an
internal voltage controlled oscillator and a phase detector.
This allows the internal top MOSFET turn-on to be locked
to the rising edge of the external clock. The frequency range
is ±30% around the operating frequency. A pulse detection
circuit is used to detect a clock on the PLLIN pin to turn on
the phase lock loop. The pulse width of the clock has to be
at least 400ns and 2V in amplitude. During the start-up of
the regulator, the phase-lock loop function is disabled.
INTVCC and DRVCC Connection
An internal low dropout regulator produces an internal
5V supply that powers the control circuitry and DRVCC
for driving the internal power MOSFETs. Therefore, if
the system does not have a 5V power rail, the LTM4606
can be directly powered by Vin. The gate driver current
through the LDO is about 20mA. The internal LDO power
dissipation can be calculated as:
PLDO_LOSS = 20mA • (VIN – 5V)
The LTM4606 also provides an external gate driver voltage pin
DRVCC. If there is a 5V rail in the system, it is recommended
to connect DRVCC pin to the external 5V rail. This is especially
true for higher input voltages. Do not apply more than 6V to
the DRVCC pin. A 5V output can be used to power the DRVCC
pin with an external circuit as shown in Figure 18.
Parallel Operation of the Module
The LTM4606 device is an inherently current mode con-
trolled device. Parallel modules will have very good current
sharing. This will balance the thermals on the design. The
voltage feedback equation changes with the variable N as
modules are paralleled:
VOUT
=
0.6V
60.4k
N
+
RFB
RFB
N is the number of paralleled modules.
4606f
13
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