LTM8046 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTM8046' PDF : 20 Pages View PDF
LTM8046
Applications Information
VOUT to VOUT– Reverse Voltage
The LTM8046 cannot tolerate a reverse voltage from VOUT
to VOUT– during operation. If VOUT– raises above VOUT dur-
ing operation, the LTM8046 may be damaged. To protect
against this condition, a low forward drop power Schottky
diode has been integrated into the LTM8046, anti-parallel
to VOUT/VOUT–. This can protect the output against many
reverse voltage faults. Reverse voltage faults can be both
steady state and transient. An example of a steady state
voltage reversal is accidentally misconnecting a powered
LTM8046 to a negative voltage source. An example of
transient voltage reversals is a momentary connection to
a negative voltage. It is also possible to achieve a VOUT
reversal if the load is short-circuited through a long cable.
The inductance of the long cable forms an LC tank circuit
with the VOUT capacitance, which drives VOUT negative.
Avoid these conditions.
Minimum Load
The LTM8046 requires a minimum load in order to main-
tain regulation. If less than the minimum load is applied,
the output voltage may rise beyond the intended value
uncontrollably, possibly damaging the LTM8046 or the
application system. Avoid this situation. The Typical
Performance Characteristics section provides graphs of
the minimum required load for several input and output
conditions at room temperature.
The LTM8046 is designed to skip switching cycles, if
necessary, to maintain regulation. While cycle skipping,
the output ripple may be higher than when the LTM8046
is not skipping cycles. The user must validate the perfor-
mance of the LTM8046 application over the appropriate
temperature, line, load and other operating conditions.
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8046. The LTM8046 is neverthe-
less a switching power supply, and care must be taken to
minimize electrical noise to ensure proper operation. Even
with the high level of integration, you may fail to achieve
specified operation with a haphazard or poor layout. See
VOUT–
GND
FB
SS
BIAS
RUN
VOUT
THERMAL/INTERCONNECT VIAS
GND
VIN
8046 F01
Figure 1. Layout Showing Suggested External Components,
Planes and Thermal Vias
Figure 1 for a suggested layout. Ensure that the grounding
and heat sinking are acceptable.
A few rules to keep in mind are:
1. Place the RADJ resistor as close as possible to its re-
spective pin.
2. Place the CIN capacitor as close as possible to the VIN
and GND connections of the LTM8046.
3. Place the COUT capacitor as close as possible to VOUT
and VOUT–.
4. Place the CIN and COUT capacitors such that their
ground current flow directly adjacent or underneath
the LTM8046.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8046.
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 1. The LTM8046 can benefit from
the heat sinking afforded by vias that connect to internal
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For more information www.linear.com/LTM8046
8046fb
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