LXT304A View Datasheet(PDF) - Level One
Part Name
Description
MFG CO.
'LXT304A' PDF : 18 Pages View PDF
/;7êíé$ /RZð3RZHU 7ìî(ì 6KRUWð+DXO 7UDQVFHLYHU
7DEOH äã (OHFWULFDO &KDUDFWHULVWLFV õ8QGHU 5HFRPPHQGHG 2SHUDWLQJ &RQGLWLRQVô ¤ FRQWLQXHG
3DUDPHWHU
6\P 0LQ 0D[ 8QLWV 7HVW &RQGLWLRQV
/RZ OHYHO RXWSXW YROWDJHëñê õSLQV çðåñ ììñ ìëñ ëêñ ëèô 92/
¤
íïé
9 ,287 ìïç P$
,QSXW OHDNDJH FXUUHQWé
,// ðìí òìí µ$
7KUHHðVWDWH OHDNDJH FXUUHQWë õSLQ ëèô
,ê/ ðìí òìí µ$
ìï Power dissipation while driving 75 Ω load over operating temperature range. Includes device and load. Digital input lev-
els are within 10% of the supply rails and digital outputs are driving a 50 pF capacitive load.
2. Functionality of pins 23 and 25 depends on mode. See Host/Hardware Mode descriptions.
3. Output drivers will output CMOS logic levels into CMOS loads.
4. Except MTIP and MRING ILL = ± 50 µA.
7DEOH ìíã $QDORJ &KDUDFWHULVWLFV õ8QGHU 5HFRPPHQGHG 2SHUDWLQJ &RQGLWLRQVô
3DUDPHWHU
0LQ
7\Sì
0D[ 8QLWV 7HVW &RQGLWLRQV
$0, RXWSXW SXOVH
DPSOLWXGHV
'6;ðì
(ì
ëïé
êïí
êïç
9
PHDVXUHG DW WKH '6;
ëïæ
êïí
êïê
9
PHDVXUHG DW OLQH VLGH
5HFRPPHQGHG RXWSXW ORDG DW 77,3 DQG 75,1*
¤
æè
¤
Ω
ìí +] ð å N+]
¤
¤
íïíì
8,
-LWWHU DGGHG E\ WKH
WUDQVPLWWHUë
å N+] ð éí N+]
¤
ìí +] ð éí N+]
¤
¤
íïíëè
8,
¤
íïíëè
8,
6HQVLWLYLW\ EHORZ '6;
%URDG %DQG
¤
õí G% ëïé 9ô ìêïç
¤
íïíè
8,
¤
¤
G%
/RVV RI 6LJQDO WKUHVKROG
'DWD GHFLVLRQ WKUHVKROG
'6;ðì
(ì
$OORZDEOH FRQVHFXWLYH ]HURV EHIRUH /26
,QSXW MLWWHU WROHUDQFH
ìí N+] ð ìíí N+]
-LWWHU DWWHQXDWLRQ FXUYH FRUQHU IUHTXHQF\ê
0LQLPXP UHWXUQ ORVVéïè
èíí
¤
¤
P9
¤
íïê
¤
9
çê
æí
ææ ø SHDN
éê
èí
èæ ø SHDN
ìçí
ìæè
ìäí
¤
íïé
¤
¤
8,
¤
ê
¤
+]
7UDQVPLW
5HFHLYH
G%
0LQ 7\S 0LQ 7\S
èì N+] ð ìíë N+]
ìå
ìíë N+] ð ëïíéå N+] ìå
ëïíéå N+] ð êïíæë N+] ìå
¤ ëí
¤ ëí
¤ ëí
¤
G%
¤
G%
¤
G%
ìï 7\SLFDO YDOXHV DUH PHDVXUHG DW ëè °& DQG DUH IRU GHVLJQ DLG RQO\â QRW JXDUDQWHHG DQG QRW VXEMHFW WR SURGXFWLRQ WHVWLQJï
ëï ,QSXW VLJQDO WR 7&/. LV MLWWHUðIUHHï
3. Circuit attenuates jitter at 20 dB/decade above the corner frequency.
4. In accordance with ITU G.703/ETS 300166 return loss specifications when wired per Figure 7 (E1).
5. Guaranteed by design.
ëðêé
L1
Share Link: 
