LY6225616ML-45SLT View Datasheet(PDF) - Unspecified
Part Name
Description
MFG CO.
'LY6225616ML-45SLT' PDF : 14 Pages View PDF
®
Rev. 1.3
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
Address
Dout
tRC
tAA
Previous Data Valid
LY6225616
256K X 16 BIT LOW POWER CMOS SRAM
tOH
Data Valid
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)
Address
CE#
LB#,UB#
OE#
Dout
tRC
tAA
tACE
tBA
tOE
tOLZ
tBLZ
tCLZ
High-Z
tOH
tOHZ
tBHZ
tCHZ
Data Valid
High-Z
Notes :
1.WE#is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low, LB# or UB# = low.
3.Address must be valid prior to or coincident with CE# = low, LB# or UB# = low transition; otherwise tAA is the limiting parameter.
4.tCLZ, tBLZ, tOLZ, tCHZ, tBHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tBHZ is less than tBLZ, tOHZ is less than tOLZ.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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