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Product Specification
AU OPTRONICS CORPORATION
M215HW01 V7
6.3 Signal Description
The module using one LVDS receiver SN75LVDS82(Texas Instruments). LVDS is a
differential signal technology for LCD interface and high speed data transfer device. LVDS
transmitters shall be SN75LVDS83(negative edge sampling). The first LVDS port(RxOxxx)
transmits odd pixels while the second LVDS port(RxExxx) transmits even pixels.
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
SIGNAL NAME
RxOIN0-
RxOIN0+
RxOIN1-
RxOIN1+
RxOIN2-
RxOIN2+
GND
RxOCLK-
RxOCLK+
RxOIN3-
RxOIN3+
RxEIN0-
RxEIN0+
GND
RxEIN1-
RxEIN1+
GND
RxEIN2-
RxEIN2+
RxECLK-
RxECLK+
RxEIN3-
RxEIN3+
GND
NC
NC
NC
VDD
VDD
VDD
DESCRIPTION
Negative LVDS differential data input (Odd data)
Positive LVDS differential data input (Odd data)
Negative LVDS differential data input (Odd data)
Positive LVDS differential data input (Odd data)
Negative LVDS differential data input (Odd data,DSPTMG)
Positive LVDS differential data input (Odd data,DSPTMG)
Power Ground
Negative LVDS differential clock input (Odd clock)
Positive LVDS differential clock input (Odd clock)
Negative LVDS differential data input (Odd data)
Positive LVDS differential data input (Odd data)
Negative LVDS differential data input (Even data)
Positive LVDS differential data input (Even data)
Power Ground
Positive LVDS differential data input (Even data)
Negative LVDS differential data input (Even data)
Power Ground
Negative LVDS differential data input (Even data)
Positive LVDS differential data input (Even data)
Negative LVDS differential clock input (Even clock)
Positive LVDS differential clock input (Even clock)
Negative LVDS differential data input (Even data)
Positive LVDS differential data input (Even data)
Power Ground
No connection (for AUO test only. Do not connect)
No connection (for AUO test only. Do not connect)
No connection (for AUO test only. Do not connect)
Power +5V
Power +5V
Power +5V
document version 0.1
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