M24256-BF View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'M24256-BF' PDF : 47 Pages View PDF
Instructions
M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF
5.1.2
Page Write
The Page Write mode allows up to 64 byte to be written in a single Write cycle, provided that
they are all located in the same page in the memory: that is, the most significant memory
address bits, A15/A6, are the same. If more bytes are sent than will fit up to the end of the
page, a “roll-over” occurs, i.e. the bytes exceeding the page end are written on the same
page, from location 0.
The bus master sends from 1 to 64 byte of data, each of which is acknowledged by the
device if Write Control (WC) is low. If Write Control (WC) is high, the contents of the
addressed memory location are not modified, and each data byte is followed by a NoAck, as
shown in Figure 8. After each transferred byte, the internal page address counter is
incremented.
The transfer is terminated by the bus master generating a Stop condition.
Figure 8. Write mode sequences with WC = 1 (data write inhibited)
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DS1766 Rev 34
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