M25P128-VMF6PB View Datasheet(PDF) - Numonyx -> Micron

Part Name

Description

MFG CO.

M25P128-VMF6PB

128-Mbit, low-voltage, serial flash memory with 54-MHz SPI bus interface

Numonyx -> Micron 

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Revision history

13 Revision history

M25P128

Table 18. Document revision history

Date

Revision

Changes

02-May-2005

0.1 First issue.

09-Jun-2005

Table 2: Protected area sizes updated.

0.2

Memory capacity modified in Section 6.3: Read Identification (RDID).

28-Aug-2005

Updated tPP values in Table 14: AC characteristics and tVSL value in

0.3

Table 8: Power-Up Timing and VWI Threshold. Modified information

in Section 4.1: Page programming and Section 6.8: Page Program

(PP).

20-Jan-2006

Document status promoted from Target specification to Preliminary

data.

1

Packages are ECOPACK® compliant. Blank option removed under

Plating Technology in Table 17. Read Electronic Signature (RES)

instruction removed. ICC1 parameter updated in Table 13: DC

characteristics.

17-Oct-2006

10-Dec-2007

Document status promoted from Preliminary Data to full Datasheet.

Write Protect pin (W) changed to Write Protect/Enhanced Program

supply voltage (W/VPP). Section 4.4: Fast Program/Erase mode and

Figure 24: VPPH timing added. Power-up specified for Fast

Program/Erase mode in Power-up and power-down section.

2

Figure 4: Bus master and memory devices on the SPI bus modified

and Note 2 added.

Note 1 added below Table 15: VDFPN8 (MLP8), 8-lead Very thin

Dual Flat Package No lead, 8 × 6mm, package mechanical data.

VIO max modified in Table 9: Absolute maximum ratings.

3

Applied Numonyx branding.

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