M25PE20-VMP6TP View Datasheet(PDF) - Numonyx -> Micron

Part Name

Description

MFG CO.

M25PE20-VMP6TP

1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout

Numonyx -> Micron 

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M25PE20, M25PE10

Instructions

6.1

Write Enable (WREN)

The Write Enable (WREN) instruction (Figure 8) sets the Write Enable Latch (WEL) bit.

The Write Enable Latch (WEL) bit must be set prior to every Page Write (PW), Page

Program (PP), Page Erase (PE), and Sector Erase (SE) instruction.

The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the

instruction code, and then driving Chip Select (S) High.

Figure 8. Write Enable (WREN) instruction sequence

S

01234567

C

Instruction

D

High Impedance

Q

AI02281E

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