M25PE40-VMN6G View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
MFG CO.
M25PE40-VMN6G
Numonyx -> Micron
'M25PE40-VMN6G' PDF : 62 Pages View PDF
M25PE40
Instructions
6.11
Note:
Write to Lock Register (WRLR)
The Write to Lock Register (WRLR) instruction is decoded only in the M25PE40 in the T9HX
process (see Important note on page 6).
The Write to Lock Register (WRLR) instruction allows bits to be changed in the Lock
Registers. Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed. After the Write Enable (WREN) instruction has been decoded, the
device sets the Write Enable Latch (WEL).
The Write to Lock Register (WRLR) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code, three address bytes (pointing to any address in the targeted
sector and one data byte on Serial Data input (D). The instruction sequence is shown in
Figure 17. Chip Select (S) must be driven High after the eighth bit of the data byte has been
latched in, otherwise the Write to Lock Register (WRLR) instruction is not executed.
Lock Register bits are volatile, and therefore do not require time to be written. When the
Write to Lock Register (WRLR) instruction has been successfully executed, the Write
Enable Latch (WEL) bit is reset after a delay time less than tSHSL minimum value.
Any Write to Lock Register (WRLR) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Figure 17. Write to Lock Register (WRLR) instruction sequence
S
0 1 2 3 4 5 6 7 8 9 10 28 29 30 31 32 33 34 35 36 37 38 39
C
Instruction
24-bit address
Lock Register
value
D
23 22 21 3 2 1 0 7 6 5 4 3 2 1 0
MSB
MSB
AI10784b
Table 10. Lock Register in(1)
Sector
Bit
Value
All sectors
b7-b2
‘0’
b1 Sector Lock Down bit value
b0 Sector Write Lock bit value
1. The table rows in gray are true for products processed in the T7X process only (see Important note on
page 6).
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