M28F410 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'M28F410' PDF : 38 Pages View PDF
M28F410, M28F420
Erase (EE) instruction. This instruction uses two
write operations. The first command written is the
Erase Set-up command 20h. The second com-
mand is the Erase Confirm command 0D0h. During
the input of the second command an address of the
block to be erased is given and this is latched into
the memory. If the second command given is not
the Erase Confirm command then the status regis-
ter bits b4 and b5 are set and the instruction aborts.
Read operations output the status register after
erasure has started.
During the execution of the erase by the P/E.C., the
memory accepts only the RSR (Read Status Reg-
ister) and ES (Erase Suspend) instructions. Status
Register bit b7 returns ’0’ while the erasure is in
progress and ’1’ when it has completed. After com-
pletion the Status Register bit b5 returns ’1’ if there
has been an Erase Failure because erasure has
not been verified even after the maximum number
of erase cycles have been executed. Status Reg-
ister bit b3 returns ’1’ if VPP does not remain at VPPH
level when the erasure is attempted and/or proced-
ing.
VPP must be at VPPH when erasing, erase should
not be attempted when VPP < VPPH as the results
will be uncertain. If VPP falls below VPPH or RP goes
Low the erase aborts and must be repeated, after
having cleared the Status Register (CLRS).
The Boot Block can only be erased when RP is also
at VHH.
Program (PG) instruction. This instruction uses
two write operations. The first command written is
the Program Set-up command 40h (or 10h). A
second write operation latches the Address and the
Data to be written and starts the P/E.C. Read
operations output the status register after the pro-
gramming has started.
Memory programming is only made by writing ’0’ in
place of ’1’ in a byte or word.
During the execution of the programming by the
P/E.C., the memory accepts only the RSR (Read
Status Register) instruction. The Status Register bit
b7 returns ’0’ while the programming is in progress
and ’1’ when it has completed. After completion the
Status register bit b4 returns ’1’ if there has been a
Program Failure. Status Register bit b3 returns a
’1’ if VPP does not remain at VPPH when program-
ming is attempted and/or during programming.
VPP must be at VPPH when programming, program-
ming should not be attempted when VPP < VPPH
as the results will be uncertain. Programming
aborts if VPP drops below VPPH or RP goes Low. If
aborted the data may be incorrect. Then after
having cleared the Status Register (CLRS), the
memory must be erased and re-programmed.
The Boot Block can only be programmed when RP
is at VHH.
Clear Status Register (CLRS) instruction. The
Clear Status Register uses a single write operation
which clears bits b3, b4 and b5, if latched to ’1’ by
the P/E.C., to ’0’. Its use is necessary before any
new operation when an error has been detected.
Erase Suspend (ES) instruction. The Erase op-
eration may be suspended by this instruction which
consists of writing the command 0B0h. The Status
Register bit b6 indicates whether the erase has
actually been suspended, b6 = ’1’, or whether the
P/E.C. cycle was the last and the erase is com-
pleted, b6 = ’0’.
During the suspension the memory will respond
only to Read (RD), Read Status Register (RSR) or
Erase Resume (ER) instructions. Read operations
initially output the status register while erase is
suspended but, following a Read instruction, data
from other blocks of the memory can be read. VPP
must be maintained at VPPH while erase is sus-
pended. If VPP does not remain at VPPH or the RP
signal goes Low while erase is suspended then
erase is aborted while bits b5 and b3 of the status
register are set. Erase operation must be repeated
after having cleared the status register, to be cer-
tain to erase the block.
Erase Resume (ER) instruction. If an Erase Sus-
pend instruction was previously executed, the
erase operation may be resumed by giving the
command 0D0h. The status register bit b6 is
cleared when erasure resumes. Read operations
output the status register after the erase is re-
sumed.
The suggested flow charts for programs that use
the programming, erasure and erase suspend/re-
sume features of the memories are shown in Figure
11 to Figure 13.
Programming. The memory can be programmed
byte-by-byte(or word-by-word in x16 organization).
The Program Supply voltage VPP must be applied
before program instructions are given, and if the
programming is in the Boot Block, RP must also be
raised to VHH to unlock the Boot Block. The Pro-
gram Supply voltage may be applied continuously
during programming.
The program sequence is started by writing a Pro-
gram Set-up command (40h) to the Command
Interface,this is followed by writing the address and
data byte or word to the memory. The Pro-
gram/Erase Controllerautomaticallystarts and per-
forms the programming after the second write
operation, providing that the VPP voltage (and RP
voltage if programming the Boot Block) are correct.
During the programming the memory status is
checked by reading the status register bit b7 which
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