M29W128GH60N1F View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
MFG CO.
M29W128GH60N1F
Numonyx -> Micron
'M29W128GH60N1F' PDF : 94 Pages View PDF
Command interface
M29W128GH, M29W128GL
Table 17. Program, Erase times and Program, Erase endurance cycles
Parameter
Min
Typ(1)(2) Max(2) Unit
Chip Erase
Block Erase (128 kbytes)(4)
40
400(3)
s
0.5
s
Erase Suspend latency time
25
35
µs
Block Erase timeout
50
µs
Single Byte Program
Byte Program
Write to Buffer Program
(64 bytes at-a-time)
Single Word Program
VPP/WP = VPPH
VPP/WP = VIH
Word Program
Write to Buffer Program
(32 words at-a-time)
Chip Program (byte by byte)
VPP/WP = VPPH
VPP/WP = VIH
Chip Program (word by word)
Chip Program (Write to Buffer Program)(5)
Chip Program (Write to Buffer Program with VPP/WP = VPPH)(5)
Chip Program (Enhanced Buffered Program)(5)
Chip Program (Enhanced Buffered Program with VPP/WP = VPP)(5)
Program Suspend latency time
16
µs
51
200(3)
µs
78
16
µs
51
200(3)
µs
78
270
800(3)
s
135
400(3)
s
20
200(3)
s
13
50(3)
s
8
40
s
5
25
s
5
15
µs
Program/Erase cycles (per block)
100,000
Cycles
Data retention
20
Years
1. Typical values measured at room temperature and nominal voltages.
2. Sampled, but not 100% tested.
3. Maximum value measured at worst case conditions for both temperature and VCC after 100,000 program/erase cycles.
4. Block Erase Polling cycle time (seeFigure 24: Data polling AC waveforms).
5. Intrinsic program timing, that means without the time required to execute the bus cycles to load the program commands.
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