M34C02
Figure 5. I2C Bus Protocol
SCL
SDA
START
Condition
SDA
Input
SDA
Change
STOP
Condition
SCL
SDA
1
2
3
MSB
START
Condition
7
8
9
ACK
SCL
SDA
1
2
3
MSB
7
8
9
ACK
STOP
Condition
AI00792B
Table 2. Device Select Code
Device Type Identifier1
Chip Enable Address2
RW
b7
b6
b5
b4
b3
b2
b1
b0
Memory Area Select
Code (two arrays)
1
0
1
0
E2
E1
E0
RW
Protection Register
Select Code
0
1
1
0
E2
E1
Note: 1. The most significant bit, b7, is sent first.
2. E0, E1 and E2 are compared against the respective external pins on the memory device.
E0
RW
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