M36W108AT, M36W108AB
Table 22. SRAM Read AC Characteristics
(TA = 0 to 70 °C, –20 to 85 °C or –40 to 85 °C; VCCS = 2.7 V to 3.6 V)
Symbol
Parameter
tAVAV
Read Cycle Time
tAVQV
Address Valid to Output Valid
tE1LQV
Chip Enable 1 Low to Output Valid
tE2HQV Chip Enable 2 High to Output Valid
tGLQV
Output Enable Low to Output Valid
tE1LQX
Chip Enable 1 Low to Output Transition
tE2HQX Chip Enable 2 High to Output Transition
tGLQX
Output Enable Low to Output Transition
tE1HQZ
Chip Enable 1 High to Output Hi-Z
tE2LQZ
Chip Enable 2 Low to Output Hi-Z
tGHQZ
Output Enable High to Output Hi-Z
tAXQX
Address Transition to Output Transition
tPU (1)
Chip Enable 1 Low or Chip Enable 2 High to Power Up
tPD (1)
Chip Enable 1 High or Chip Enable 2 Low to Power Down
tCCR (2)
Chip Enable Recovery Time
Note: 1. Sampled only. Not 100% tested.
2. See Flash-SRAM Switching Waveforms.
SRAM Chip
100
CL = 100pF
Min
Max
100
100
100
100
50
10
10
5
0
30
0
30
0
30
15
0
100
0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Figure 15. SRAM Read Mode AC Waveforms, Address Controlled
A0-A16
tAVQV
tAXQX
tAVAV
VALID
DQ0-DQ7
DATA VALID
DATA VALID
AI02436
Note: E1S = Low, E2S = High, G = Low, W = High.
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