M39832 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
M39832
STMicroelectronics
'M39832' PDF : 36 Pages View PDF
M39832
Table 5A. Flash Instructions (EF=0, EE=1)
Mne.
Instr. Cyc.
Addr. (3,7)
1+
Read/Reset
RD (2,4) Memory
Data
Array
Addr.
(3,7)
3+
Byte
Word
Data
1st
Cyc.
2nd
Cyc.
3rd
Cyc.
4th
Cyc.
5th
Cyc.
6th
Cyc.
7th
Cyc.
X
Read Memory Array until a new write cycle is initiated.
F0h
AAAAh 5555h AAAAh
Read Memory Array until a new write
5555h 2AAAh 5555h cycle is initiated.
AAh
55h
F0h
AS (4) Auto Select
Addr.
(3,7)
3+
Data
PG Program
Addr.
(3,7)
4
Data
Addr.
(3,7)
BE Block Erase 6
Byte
Word
Byte
Word
Byte
Word
AAAAh
5555h
AAh
5555h
2AAAh
55h
AAAAh
Read Electronic Signature or Block
5555h
Protection Status until a new write
cycle is initiated. See Note 5 and 6.
90h
AAAAh
5555h
AAh
5555h
2AAAh
55h
AAAAh Program
Read Data Polling or
5555h Address Toggle Bit until Program
completes.
A0h
Program
Data
AAAAh
5555h
AAAAh AAAAh
5555h
Block
Address
Additiona
l Block
(8)
5555h 2AAAh 5555h 5555h 2AAAh
Data
AAh
55h
80h
AAh
55h
30h
30h
FAE
Flash Array
Erase
Addr.
(3,7)
6
Byte
Word
AAAAh 5555h AAAAh AAAAh 5555h AAAAh
5555h 2AAAh 5555h 5555h 2AAAh 5555h Note 9
Data
AAh
55h
80h
AAh
55h
10h
ES (10)
Erase
Suspend
Addr. (3,7)
1
Data
X Read until Toggle stops, then read all the data needed
from any Block(s) not being erased then Resume Erase.
B0h
ER
Erase
Resume
Addr. (3,7)
1
Data
X Read Data Polling or Toggle Bits until Erase completes
or Erase is suspended another time
30h
Notes: 1. Commands not interpreted in this table will default to read array mode.
2. A wait of tPLYH is necessary after a Read/Reset command if the memory was in an Erase or Program mode
before starting any new operation (see Table 14 and Figure 9).
3. X = Don’t Care.
4. The first cycles of the RD or AS instructions are followed by read operations. Any number of read cycles can occur after
the command cycles.
5. Signature Address bits A0, A1, at VIL will output Manufacturer code (20h). Address bits A0 at VIH and A1, at VIL will output
Flash code.
6. Block Protection Address: A0, at VIL, A1 at VIH and A15-A18 within the Block will output the Block Protection status.
7. For Coded cycles address inputs A11-A18 are don’t care.
8. Optional, additional Blocks addresses must be entered within the erase timeout delay after last write entry, timeout status
can be verified through DQ3 value (see Erase Timer Bit DQ3 description). When full command is entered, read Data Polling
or Toggle bit until Erase is completed or suspended.
9. Read Data Polling, Toggle bits or FRB until Erase completes.
10.During Erase Suspend, Read and Data Program functions are allowed in blocks not being erased.
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