M41T80 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'M41T80' PDF : 27 Pages View PDF
M41T80
Clock operation
3.5
Note:
Output driver pin
When the AFE bit and SQWE bit are not set, the IRQ/OUT/SQW pin becomes an output
driver that reflects the contents of D7 of the control register. In other words, when D7 (OUT
bit) of address location 08h is a '0,' then the IRQ/OUT/SQW pin will be driven low.
The IRQ/OUT/SQW pin is an open drain which requires an external pull-up resistor.
3.6
Preferred power-on default
When powering the device up from ground (0 V), the following register bits are set to a '0'
state: ST; AFE; and SQWE. The following bits are set to a '1' state: OUT and 32KE (see
Table 6: Preferred power-on default values on page 17).
Table 6. Preferred power-on default values
Condition
ST
OUT
AFE
SQWE
Power-up(1)
0
1
0
0
1. If VCC falls to a voltage, 0 V < VCC < 2.0 V, these bits should be rewritten by the user.
32KE
1
Doc ID 9074 Rev 5
17/27
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