M41T81 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'M41T81' PDF : 28 Pages View PDF
Figure 12. Bus Timing Requirements Sequence
SDA
tBUF
SCL
P
tHD:STA
tR
tF
tHIGH
S
tLOW
tSU:DAT
tHD:DAT
M41T81
tHD:STA
tSU:STA
SR
tSU:STO
P
AI00589
Table 7. AC Characteristics
Sym
Parameter(1)
Min
Typ
Max
Units
fSCL
SCL Clock Frequency
0
400
kHz
tLOW
Clock Low Period
1.3
µs
tHIGH
Clock High Period
600
ns
tR
SDA and SCL Rise Time
300
ns
tF
SDA and SCL Fall Time
300
ns
tHD:STA
START Condition Hold Time
(after this period the first clock pulse is generated)
600
ns
tSU:STA
START Condition Setup Time
(only relevant for a repeated start condition)
600
ns
tSU:DAT(2) Data Setup Time
100
ns
tHD:DAT Data Hold Time
0
µs
tSU:STO STOP Condition Setup Time
600
ns
tBUF
Time the bus must be free before a new
transmission can start
1.3
µs
Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.0 to 5.5V (except where noted).
2. Transmitter must internally provide a hold time to bridge the undefined region (300ns max) of the falling edge of SCL.
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