M5M51008DFP View Datasheet(PDF) - Renesas Electronics

Part Name

Description

MFG CO.

M5M51008DFP

1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM

Renesas Electronics 

1 2 3 4 5 6 7 8 9

Write cycle ( S1 control mode)

A0~16

S1

Ver. 1.1

MITSUBISHI LSIs

M5M51008DFP,VP,RV,KV,KR -55H, -70H

1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM

tCW

tsu (A)

tsu (S1)

trec (W)

S2

(Note 5)

(Note 7)

W

(Note 5)

DQ1~8

Write cycle (S2 control mode)

A0~16

(Note 6)

tsu (D)

th (D)

DATA IN

STABLE

tCW

(Note 5)

(Note 5)

S1

S2

W

DQ1~8

(Note 5)

tsu (A)

tsu (S2)

trec (W)

(Note 5)

(Note 7)

(Note 5)

(Note 6)

tsu (D)

th (D)

DATA IN

STABLE

Note 5: Hatching indicates the state is "don't care".

6: Writing is executed while S2 high overlaps S1 and W low.

7: When the falling edge of W is simultaneously or prior to the falling edge of S1

or rising edge of S2, the outputs are maintained in the high impedance state.

8: Don't apply inverted phase signal externally when DQ pin is output mode.

(Note 5)

6

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