M62465FP View Datasheet(PDF) - Renesas Electronics
Part Name
Description
MFG CO.
'M62465FP' PDF : 25 Pages View PDF
M62465FP
Digital Control Specifications
(1) Data timing
REQ
t7
t2 t3
t4 t8
SCK
t1
t5 t6
DATA
0 1 2 3 4 5 6 7 8 9 10 11
Notes: 1. SCK is disable when REQ is high.
2. REQ must turn to high after SCK pulse turn to high.
Item
Symbol
Min
Typ
Max
Unit
SCK clock duration
t1
2
—
—
µs
SCK “H” pulse width
t2
0.8
—
—
µs
SCK “L” pulse width
t3
0.8
—
—
µs
REQ hold time
t4
1.6
—
—
µs
DATA setup time
t5
0.8
—
—
µs
DATA hold time
t6
0.8
—
—
µs
SCK setup time
t7
0.8
—
—
µs
REQ “H” pulse width
t8
1.6
—
—
µs
(2) Data Format
BIT0
BIT1 BIT2 BIT3
ADD/SUB NOISE SEQ
SELECTOR2
SELECTOR3
Cch. TRIMMER
S1
S2
S3
V1
Serial Data Format
Data
BIT4 BIT5 BIT6 BIT7
SELECTOR1
CENTER MODE
MIX
LO1
LO2
LO3
Sch. TRIMMER
V2
V3
V4
SFB
BIT8
No use
No use
MOS
BIT9
MIC
Address
BIT10 BIT11
0
0
0
1
1
0
1
1
(3) Decoder
Address (BIT10, 11) = 0, 0
ADD
SUB
Mode
ADD/SUB
BIT0
0
1
OFF
ON
Mode
BIT1
0
1
NOISE SEQ
Mode
L
C
R
S
BIT2
0
0
1
1
BIT3
0
1
0
1
REJ03F0219-0201 Rev.2.01 Mar 31, 2008
Page 12 of 24
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