M7020 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'M7020' PDF : 150 Pages View PDF
M7020R
Comparand Registers
The device contains 32 68-bit comparand regis-
ters (16 pairs) dynamically selected in every
SEARCH operation to store the comparand pre-
sented on the DQ Bus. The LEARN command will
later use these registers when executed. The
M7020R stores the SEARCH command’s Cycle A
comparand in the even-numbered register and the
Cycle B comparand in the odd-numbered register,
as shown in Figure 10.
Mask Registers
The device contains 16 68-bit global mask regis-
ters (8 pairs) dynamically selected in every
SEARCH operation to select the search subfield.
The addressing of these registers is explained in
Figure 11. The three-bit GMR Index supplied on
the CMD bus can apply 8 pairs of global masks
during the SEARCH and WRITE operations, as
shown in Figure 11.
Note: In 68-bit SEARCH and WRITE operations,
the host ASIC must program both the even and
odd mask registers with the same values.
Each mask bit in the GMRs is used during
SEARCH and WRITE operations. In SEARCH op-
erations, setting the mask bit to '1' enables com-
pares; setting the mask bit to '0' disables
compares (forced match) at the corresponding bit
position. In WRITE operations to the data or mask
array, setting the mask bit to '1' enables WRITEs;
setting the mask bit to '0' disables WRITEs at the
corresponding bit position.
Figure 10. Comparand Register Selection
During SEARCH and LEARN
Instructions
68
A ddr e ss
Index 135
0
0
1
2
4
6
68
0
1
3
5
7
15
30
31
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Figure 11. Addressing the Global Masks
Register Array
68
A ddr e ss
Index 135
0
0
1
2
2
4
3
6
4
8
5
10
6
12
7
14
68
0
1
3
5
7
9
11
13
15
SEARCH and WRITE Command
Global Mask Selection
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