M95128-BN3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'M95128-BN3' PDF : 39 Pages View PDF
M95256, M95128
SPI Modes
These devices can be driven by a microcontroller
with its SPI peripheral running in either of the two
following modes:
– CPOL=0, CPHA=0
– CPOL=1, CPHA=1
For these two modes, input data is latched in on
the rising edge of Serial Clock (C), and output data
Figure 5. SPI Modes Supported
CPOL CPHA
is available from the falling edge of Serial Clock
(C).
The difference between the two modes, as shown
in Figure 5., is the clock polarity when the bus
master is in Stand-by mode and not transferring
data:
– C remains at 0 for (CPOL=0, CPHA=0)
– C remains at 1 for (CPOL=1, CPHA=1)
0
0
C
1
1
C
D
MSB
Q
MSB
AI01438B
8/39
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