DA7838.002
20 September, 2000
$%62/87( 0$;,080 5$7,1*6
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Supply Voltage
Storage Temperature
6\PERO
VDD
Ts
5(&200('(' 23(5$7,21 &21',7,216
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Supply Voltage
Supply Current
Operating Temperature
6\PERO
VDD
IDD
Ta
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(GND = 0V)
0LQ
0D[ 8QLW
-0.5
5.5
V
-55
+150
oC
0LQ 7\S 0D[ 8QLW
4.75
5
5.25
V
4
6
mA
0
+70
oC
(/(&75,&$/ &+$5$&7(5,67,&6
u ,QSXWV
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Input high voltage
Input low voltage
Input leakage current
Input capacitance load
Internal pull-up resistor for
digital inputs
u 2XWSXWV
6\PERO
VIH
VIL
IIL
CI
Rpull-up
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Output low voltage
Output high voltage
u 'DWD 7LPLQJ
6\PERO
VOL
VOH
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Low to high logic transition time
High to low logic transition time
6\PERO
tR
tF
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TDO delay time after TXC
RDI set up time before RXC
RDI hold time after RXC
6\PERO
T1
T2
T3
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TDO delay time after TXC
RDI set up time before RXC
RDI hold time after RXC
6\PERO
T1
T2
T3
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VIN = 0.4v
VIN = 2.5v
(test conditions: VDD = +5V, VSS = 0V, 0OC to 70OC)
0LQ
7\S
0D[ 8QLW
3.5
V
1.1
V
-100
pA
5
pF
350
k
850
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IOL = -0.6mA
IOH = 0.4mA
(test conditions: VDD = +5V, VSS = 0V, 0OC to 70OC)
0LQ
7\S
0D[ 8QLW
0.4
V
4.6
V
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CL = 10pF
CL = 10pF
(test conditions: VDD = +5V, VSS = 0V, 0OC to 70OC)
0LQ 7\S
0D[
8QLW
20
ns
20
ns
&RQGLWLRQV
&RQGLWLRQV
0LQ
50
1/4 TRXC
1/4 TRXC
7\S
(test conditions: TSL = 1)
0D[
8QLW
TTXC/16+350 ns
ns
ns
(test conditions: TSL = 0, TMG = 16xTXC)
0LQ 7\S
0D[
8QLW
50
1/TMG+350 ns
1/4 TRXC
ns
1/4 TRXC
ns
3 (9)