MB84VB2000 View Datasheet(PDF) - Fujitsu
Part Name
Description
MFG CO.
'MB84VB2000' PDF : 28 Pages View PDF
MB84VB2000-10/MB84VB2001-10
Addresses
3rd Bus Cycle
555H
tWC
PA
tAS
tAH
DaDtaataPoPlolinlligng
PA
WE
OE
CE
Data
tWS
tWH
tGHEL
tCP
tCPH
tDS
A0H
tDH
PD
tWHWH1
DQ77 DOUT
Notes: 1.PA is address of the memory location to be programmed.
2.PD is data to be programmed at byte address.
3.DQ7 is the output of the complement of the data written to the device.
4.DOUT is the output of the data written to the device.
5.Figure indicates last two bus cycles out of four bus cycle sequence.
6.These waveforms are for the ×16 mode. (The addresses differ from ×8 mode.)
Figure 4 Alternate CE Controlled Program Operation Timings
18
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