MC2502 View Datasheet(PDF) - PMD
Part Name
Description
MFG CO.
'MC2502' PDF : 51 Pages View PDF
IOCS16-
INT3
INT4
INT5
INT7
INT6
D
VCC
GND
8
J1
D1
C1
D2
C2
D3
C3
D4
C4
D5
C5
D6
C6
D7
C7
D8
C8
D9
C9
D10
C10
D11
C11
D12
C12
D13
C13
D14
C14
D15
C15
D16
C16
D17
C17
D18
C18
CON AT36
BD8
BD9
BD10
BD11
BD12
BD13
BD14
BD15
GND
RESET
VCC
GND
C
IOW*
IOR*
INT2
INT1
INT0
VCC
GND
J2
B1
A1
B2
A2
B3
A3
B4
A4
B5
A5
B6
A6
B7
A7
B8
A8
B9
A9
B10
A10
B11
A11
B12
A12
B13
A13
B14
A14
B15
A15
B16
A16
B17
A17
B18
A18
B19
A19
B20
A20
B21
A21
B22
A22
B23
A23
B24
A24
B25
A25
B26
A26
B27
A27
B28
A28
B29
A29
B30
A30
B31
A31
CON AT62
BD7
BD6
BD5
BD4
BD3
BD2
BD1
BD0
AEN
SA11
SA10
SA9
SA8
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
B
GND
S1
1
8
2
7
3
6
4
5
SW DIP-4
SW1
SW2
SW3
SW4
SW[4..1] ENCODE BASE ADR.
0X300 THRU 0X3F0. A CLOSED
SWITCH ENCODES 0. THE BASE
ADDRESSES ARE ON 10 HEX
BOUNDARIES.
SW4-SW1 BADR
0
OX300
1
OX310
2
OX320
3
OX330
4
OX340
A
5
OX350
6
OX360
7
OX370
8
OX380
A
OX3A0
B
OX3B0
C
OX3C0
D
OX3D0
E
OX3E0
F
OX3F0
8
7
BD[0..15]
SA[1..11]
BD15
BD14
BD13
BD12
BD11
BD10
BD9
BD8
HSELN
IOR*
BD0
BD1
BD2
BD3
BD4
BD5
BD6
BD7
HSELN
IOR*
6
U4
2
3
4
A1
A2
A3
5
6
7
8
9
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
18
17
16
15
14
13
12
11
HD15
HD14
HD13
HD12
HD11
HD10
HD9
HD8
19
1
G
DIR
74LS245
U5
2
3
4
5
6
7
8
9
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
18
17
16
15
14
13
12
11
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
19
1
G
DIR
74LS245
HD[0..15]
U?
COM
R1
R2
R3
R4
1
2
3
4
5
R5
R6
R7
6
7
8
RSIP8
VCC
RS-
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SW1
SW2
SW3
SW4
VCC
VCC
GND
GND
AEN
U2
2
4
6
8
11
13
15
17
P0
P1
P2
P3
P4
P5
P6
P7
3
5
7
9
Q0
Q1
Q2
Q3
12
14
16
18
Q4
Q5
Q6
Q7
P=Q 19
BADRN
HRDY MAY
BE USED TO
INTERRUPT THE
PC. IT CAN BE
READ IN THE
STATUS REG.
VCC
X1
1 ENB
40MHz
1G
74LS688
5
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
T1
HD15
HCMD
HSELN
IOW*
IOR*
HRDY
OUT 3
40MHz
GND
GND
47
25
49
82
QUADA1
QUADB1
INDEX1
HOME1
48
44
93
29
QUADA2
QUADB2
INDEX2
HOME2
33
51
83
88
QUADA3
QUADB3
INDEX3
HOME3
30
58
28
45
QUADA4
QUADB4
INDEX4
HOME4
12
10
HOSTDATA0
HOSTDATA1
99
98
1
11
97
HOSTDATA2
HOSTDATA3
HOSTDATA4
HOSTDATA5
HOSTDATA6
95
76
74
73
75
2
3
7
6
HOSTDATA7
HOSTDATA8
HOSTDATA9
HOSTDATA10
HOSTDATA11
HOSTDATA12
HOSTDATA13
HOSTDATA14
HOSTDATA15
81
94
100
92
8
HOSTCMD
~HOSTSLCT
~HOSTWRITE
~HOSTREAD
HOSTRDY
89 MASTERCLKIN
5
91
HOSTMODE0
HOSTMODE1
U2
SA3
2
1 SA3N
BADRN
NOT
U2
2
1
BADR
BADR
NOT
BADRN
ADR6
SA3
SA1
SA2
U2
2
3
4
OR3
U2
2
3
AND2
B+0,2,4
1 HSELN
1 ADR6
GND
2
1 IOCS16-
U2
TRI
U2
2,4
SA1
2
1
HCMD
SA2
3
OR2
BADRN
2 U2
SA1
3
SA2
4
1
SA3N
5
IOW*
6
NOR5
ALL COMPONENTS LABELED U2
MAY BE EASILY IMPLEMENTED
IN A CPLD.
B+8
RST
RESET
U2
2
3
NOR2
7
6
5
4
3
2
1
R?
VCC
VCC
22K
U3
U6
D[0..15]
CPDATA0
CPDATA1
CPDATA2
CPDATA3
CPDATA4
CPDATA5
CPDATA6
38
36
35
32
31
37
42
CPDATA7
CPDATA8
CPDATA9
CPDATA10
CPDATA11
CPDATA12
CPDATA13
CPDATA14
CPDATA15
39
18
14
71
13
70
15
69
68
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
CPADDR0 41
CPADDR1
CPADR15
~CPPERIPHSLCT
~CPSTROBE
CPR/~W
43
50
52
54
53
~CPINTRPT 77
CPCLK 24
PWM1A
PWM1B
PWM1C
PWM2A
PWM2B
PWM2C
PWM3A
PWM3B
PWM3C
PWM4A
PWM4B
PWM4C
21
62
23
85
87
86
20
19
63
79
78
80
PWMS1A
PWMS2A
PWMS3A
PWMS4A
61
60
59
26
ADR0
ADR1
ADR15
IS-
CPSTRB-
CPR/W
CPINTR-
CLK
GND
I/O2N40
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
CPINTR-
RS-
CLK
9
10
11
12
15
16
17
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
18
19
22
23
24
25
26
27
28
DATA7
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
53 I/OINTRP
63
65
54
49
64
POSLIM1
POSLIM2
POSLIM3
POSLIM4
NEGLIM1
66
55
51
NEGLIM2
NEGLIM3
NEGLIM4
73
90
91
101
102
105
107
108
109
68
69
70
HALL1A
HALL1B
HALL1C
HALL2A
HALL2B
HALL2C
HALL3A
HALL3B
HALL3C
HALL4A
HALL4B
HALL4C
72
100
106
67
AXISIN1
AXISIN2
AXISIN3
AXISIN4
30
31
34
33
32
38
N/C
N/C
N/C
N/C
N/C
N/C
39 N/C
41 ~RESET
58 I/OCK
ADDR0
ADDR1
110
111
ADR0
ADR1
ADDR2
ADDR3
ADDR4
ADDR5
112
114
115
116
D
ADDR6 117
ADDR7
ADDR8
118
119
ADDR9
ADDR10
122
123
ADDR11 124
ADDR12
ADDR13
125
126
ADDR14
ADDR15
127
128
ADR15
N/C 131
~RAMSLCT
~PERIPHSLCT
R/~W
~STROBE
129
130 IS-
4 CPR/W
6 CPSTRB-
~WRITEENBL 1
W/~R 132
~HOSTINTRPT 98 HINT-
AXISOUT1
AXISOUT2
AXISOUT3
AXISOUT4
94
95
96
97
HINT- MAY
BE USED TO
INTERRUPT THE
PC. IT CAN BE
READ IN THE
C
SRLRCV
SRLXMT
43
44
STATUS REG.
SYNCH
SRLENABLE
45
99
ANALOG1
ANALOG2
ANALOG3
ANALOG4
ANALOG5
74
89
75
88
76
ANALOG6
ANALOG7
ANALOG8
83
77
82
ANALOGVCC
ANALOGREFHIGH
ANALOGREFLOW
ANALOGGND
84
85
86
87
N/C 78
B
N/C
N/C
79
80
N/C 81
CP2N40
GND
1
RS-
4
A
PERFORMANCE MOTION DEVICES
55 OLD BEDFORD RD
LINCOLN, MA 01773
Title
16 BIT ISA INTERFACE (GEN2DB1)
Size Document Number
Rev
B
B
Date: Thursday, April 11, 2002
Sheet
0
of 0
3
2
1
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